参数资料
型号: 74HC4059N,112
厂商: NXP Semiconductors
文件页数: 18/20页
文件大小: 0K
描述: IC PROG DIV-BY-N COUNTER 24-DIP
产品培训模块: Logic Packages
标准包装: 360
系列: 74HC
逻辑类型: 除以 N
方向:
元件数: 1
每个元件的位元数: 16
复位: 异步
计时: 同步
计数速率: 43MHz
触发器类型: 正边沿
电源电压: 2 V ~ 6 V
工作温度: -40°C ~ 125°C
安装类型: 通孔
封装/外壳: 24-DIP(0.600",15.24mm)
供应商设备封装: 24-DIP
包装: 管件
1998 Jul 08
7
Philips Semiconductors
Product specication
Programmable divide-by-n counter
74HC/HCT4059
FUNCTION TABLE
Note
1. It is recommended that the device is in the master preset mode (Kb =Kc = logic 0) in order to correctly initialize the
device prior to start-up. An example of a suitable external circuit is shown in Fig.14.
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Table 1
Table 2
Table 3
LATCH
ENABLE
INPUT
MODE
SELECT
INPUTS
FIRST COUNTING
SECTION
DECADE 1
LAST COUNTING
SECTION
DECADE 5
COUNTER
RANGE
OPERATION
LE
Ka Kb Kc MODE
MAX
PRESET
STATE
JAM
INPUTS
USED
DIVIDED
BY
MAX.
PRESET
STATE
JAM
INPUTS
USED
BCD
MAX.
BINARY
MAX.
HH
H
2
1
J1
87
J2J3J4
15 999 17 331
timer mode
HL
H
4
3
J1J2
43
J3J4
15 999 18 663
HH
L
H
5
4
J1J2J3
21
J4
9 999 13 329
HL
L
H
8
7
J1J2J3
21
J4
15 999 21 327
HH
H
L
10
9
J1J2J3J4 10
9 999 16 659
LH
H
2
1
J1
87
J2J3J4
15 999 17 331
divide-by-n mode
LL
H
4
3
J1J2
43
J3J4
15 999 18 663
LH
L
H
5
4
J1J2J3
21
J4
9 999 13 329
LL
L
H
8
7
J1J2J3
21
J4
15 999 21 327
LH
H
L
10
9
J1J2J3J4 10
9 999 16 659
HL
H
L
10
9
J1J2J3J4 10
9 999 16 659
L
H
L
preset inhibited
xed
10 000
divide-by-10 000
mode
X
L
master preset
master preset
mode
41
5
9
6
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
LL
H
L
H
L
H
L
H
L
H
L
61
7
4
5
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
L
H
HH
H
L
HL
H
L
H
L
97
4
8
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
H
L
H
HH
H
L
HL
L
H
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