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| 型号： | 74LCX126MX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 7/9页 |
| 文件大小： | 0K |
| 描述： | IC BUFFER QUAD LV N-INV 14SOIC |
| 标准包装： | 1 |
| 系列： | 74LCX |
| 逻辑类型： | 缓冲器/线路驱动器，非反相 |
| 元件数： | 4 |
| 每个元件的位元数： | 1 |
| 输出电流高，低： | 24mA，24mA |
| 电源电压： | 2 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 14-SOIC |
| 包装： | 标准包装 |
| 其它名称： | 74LCX126MXDKR |
74LVC1G57
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6 — 6 December 2011
7 of 20
NXP Semiconductors
74LVC1G57
Low-power configurable multiple function gate
11. Dynamic characteristics
[1]
Typical values are measured at nominal VCC and at Tamb = 25 C.
[2]
tpd is the same as tPLH and tPHL
[3]
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(C
L VCC
2
f
o) = sum of outputs.
12. Waveforms
Table 9.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 13.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
tpd
propagation delay
A, B, C to Y; see Figure 12
VCC = 1.65 V to 1.95 V
1.0
6.0
14.4
1.0
18
ns
VCC = 2.3 V to 2.7 V
0.5
3.5
8.3
0.5
10.4
ns
VCC = 2.7 V
0.5
4.2
8.5
0.5
10.6
ns
VCC = 3.0 V to 3.6 V
0.5
3.8
6.3
0.5
7.9
ns
VCC = 4.5 V to 5.5 V
0.5
3.0
5.1
0.5
6.4
ns
CPD
power dissipation
capacitance
VCC =3.3 V; VI =GND to VCC
-22-
-
pF
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 12. Input A, B and C to output Y propagation delay times
Y output
A, B, C input
Y output
GND
VI
VOH
VOL
VM
tPLH
tPHL
001aab593
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