参数资料
型号: 78M6610+PSU/C00
厂商: Maxim Integrated
文件页数: 48/63页
文件大小: 0K
描述: IC ENERGY MEASURMENT 1PH 16TSSOP
标准包装: 96
输入阻抗: 30 千欧 ~ 90 千欧
电压 - 高输入/输出: 2V
电压 - 低输入/输出: 0.8V
电流 - 电源: 8.1mA
电源电压: 3 V ~ 3.6 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 管件
78M6610+PSU Data Sheet
Example 3: Non-Contiguous Read accesses of address 0x17 and 0x0A.
Byte#
1
2
3
4
5
6
7
8
9
10
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
NbrAcc[3:0] = 0x00 Addr7=0 Addr6=0
Addr[5:0] = 0x17
Data[23:16] @ 0x17
Data[15:8] @ 0x17
Data[7:0] @ 0x17
NbrAcc[3:0] = 0x00 Addr7=0 Addr6=0
Addr[5:0] = 0x0A
Data[23:16] @ 0x0A
Data[15:8] @ 0x0A
Data[7:0] @ 0x0A
Bit 1
0
RD=0
0
W=1
Bit 0
1
0
1
0
The timing of the transaction can be organized in different ways depending on the host capabilities. The
above transaction can be a succession of bytes as shown in Figure 17 . Those bytes are carried by a
continuously active SCK, with eight clock periods per byte.
SDI
Byte 1: Control
Byte 2: Addr & Ctrl
Byte 3: Data[23:16]
Byte 4: Data[15:8]
Byte 5: Data[7:0]
SDO
SCK
HiZ
SCK Active
SSB
Figure 17: Write Access Example
The host also has the possibility to space out the bytes transmitted. In such a case, SCK is inactive
during the “in-between-bytes” gap, as illustrated by Figure 18 . Note that the figure shows two gaps, one
between the configuration and the data transactions and another between bytes within the data
transaction. The placement of those gaps is strictly for the purpose of illustrating the concept.
SDI
Byte 1: Control
B yte  2: Addr & Ct rl B yte  3: Data[23:16 ]
Byte 4: Data[15:8 ]
Byte 5: Data[7:0]
SDO
HiZ
SCK
SCK Active
SCK Active
SCK Active
SSB
Figure 18: Write Access with Interrupted SCK
48
Rev 1
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