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| 型号： | 78M6612-MR/F/P2 |
| 厂商： | Maxim Integrated |
| 文件页数： | 42/46页 |
| 文件大小： | 0K |
| 描述： | IC PWR MEASUREMENT AC 68SQFN |
| 标准包装： | 250 |
| 系列： | * |
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78M6612 Data Sheet
6 Pin Descriptions
DS_6612_001
6.1
Power/Ground Pins
Table 27: Power/Ground Pins
Name
GNDA
GNDD
V3P3A
V3P3SYS
V3P3D
VBAT
V2P5
Type
P
P
P
P
O
P
O
Circuit
–
–
–
–
13
12
10
Description
Analog ground: This pin should be connected directly to the ground
plane.
Digital ground: This pin should be connected directly to the ground
plane.
Analog power supply: A 3.3V power supply should be connected to
this pin, must be the same voltage as V3P3SYS.
System 3.3 V supply. This pin should be connected to a 3.3 V power
supply.
Auxiliary voltage output of the chip, controlled by the internal 3.3 V
selection switch. In mission mode, this pin is internally connected to
V3P3SYS. In BROWNOUT mode, it is internally connected to VBAT.
This pin is floating in LCD and sleep mode.
Battery backup power supply. A battery or super-capacitor is to be
connected between VBAT and GNDD. If no battery is used, connect
VBAT to V3P3SYS.
Output of the internal 2.5 V regulator. A 0.1 μ F capacitor to GNDA
should be connected to this pin.
6.2
Analog Pins
Table 28: Analog Pins
Name
IA, IB
VA, VB
V1
VREF
XIN
XOUT
Type
I
I
I
O
I
Circuit
6
6
7
9
8
Description
Line Current Sense Inputs: These pins are voltage inputs to the
internal A/D converter. Typically, they are connected to the outputs of
current sensors. Unused pins must be connected to V3P3A.
Line Voltage Sense Inputs: These pins are voltage inputs to the
internal A/D converter. Typically, they are connected to the outputs
of resistor dividers. Unused pins must be connected to V3P3A or
tied to the voltage sense input that is in use.
Comparator Input: This pin is a voltage input to the internal power-fail
comparator. The input voltage is compared to the internal BIAS
voltage (1.6 V). If the input voltage is above VBIAS, the comparator
output will be high (1). If the comparator output is lower, a voltage
fault will occur and the chip will be forced to battery mode.
Voltage Reference for the ADC. This pin is normally disabled by
setting the VREF_CAL bit in the I/O RAM and can then be left
unconnected. If enabled, a 0.1 μ F capacitor to GNDA should be
connected.
Crystal Inputs: A 32 kHz crystal should be connected across these
pins. Typically, a 27 pF capacitor is also connected from each pin to
GNDA. It is important to minimize the capacitance between these
pins. See the crystal manufacturer datasheet for details.
Pin types: P = Power, O = Output, I = Input, I/O = Input/Output
The circuit number denotes the equivalent circuit, as specified in Section 7 I/O Equivalent Circuits .
42
Rev 2
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