参数资料
型号: 78M6631-EVM-1
厂商: Maxim Integrated Products
文件页数: 12/30页
文件大小: 0K
描述: EVAL BOARD 78M6631
标准包装: 1
系列: *
78M6631 Data Sheet
DS_6631_056
1.14 Temperature Sensor
The device includes an on-chip temperature sensor for determining the temperature of the bandgap
reference. The primary use of the temperature data is to determine the magnitude of compensation
required to offset the thermal drift in the system.
1.15 General-Purpose Digital I/O
The 78M6631 includes 17 general-purpose digital I/O pins. As inputs, these pins are 5V compatible (no
current-limiting resistors are needed). On reset or power-up, all DIO pins are inputs. Their input/output
directions are subsequently set by the MPU. The digital I/O pins can be categorized as follows:
?
?
?
?
?
?
?
?
?
?
DIO3
DIO4, DIO5
DIO6
DIO8, DIO9, DIO11
DIO17
DIO24, DIO25
DIO29, DIO30
DIO45, DIO47
DIO51
DIO53, DIO55
(1
(2
(1
(3
(1
(2
(2
(2
(1
(2
pin)
pins)
pin)
pins)
pin)
pins)
pins)
pins)
pin)
pins)
DIO pin
DIO/EEPROM
DIO pin (multifunction)
DIO pins
DIO pin
DIO pins
DIO pins
DIO pins
DIO pin
DIO pins
1.16 D/ Y Selection Pin
The D/ Y pin selects either the Delta or the Wye configuration. At power-on, the Delta/Wye selection
register assumes the state of the D/ Y pin. The register value can be modified by the software overriding
the state of the D/ Y pin.
1.17 EEPROM Interface
The 78M6631 provides hardware support for an optional 2-pin or a 3-wire (MICROWIRE ? ) EEPROM
interface.
2-Pin EEPROM Interface
The dedicated 2-pin serial interface communicates with external EEPROM devices. The interface is
multiplexed onto the DIO4 (SDCK) and DIO5 (SDATA) pins.
3-Wire (MICROWIRE) EEPROM Interface
A 500 kHz three-wire interface, using SDATA, SDCK and a DIO pin for CS, is also available.
1.18 SPI Slave Port
The slave SPI port communicates directly with the MPU data bus and is able to directly read and write
XRAM and IORAM locations. It is also able to send commands to the MPU. The interface to the slave port
consists of the PCSZ, PCLK, PSDI, and PSDO pins.
A typical SPI transaction is as follows. While PCSZ is high, the port is held in an initialized/reset state.
During this state, PSDO is held in high-Z state and all transitions on PCLK and PSDI are ignored. When
PCSZ falls, the port begins the transaction on the first rising edge of PCLK. A transaction consists of an
8-bit command, a 16-bit address, and then one or more bytes of data. The transaction ends when PCSZ
is raised. Some transactions can consist of a command only. The last SPI command and address (if part
of the command) are available in the IORAM.
The SPI port supports data transfers at up to 1 Mbps. The SPI commands are described in Table 1 and
Figure 4 illustrates the SPI Interface read and write timing.
MICROWIRE is a registered trademark of National Semiconductor.
12
Rev 2
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