参数资料
型号: 78M6631-EVM-1
厂商: Maxim Integrated Products
文件页数: 13/30页
文件大小: 0K
描述: EVAL BOARD 78M6631
标准包装: 1
系列: *
DS_6631_056
Command
11xx xxxx ADDR D0 ... DN
1100 0000 ADDR D0 ... DN
10xx xxxx ADDR D0 ... DN
1000 0000 ADDR D0 ... DN
78M6631 Data Sheet
Table 1: SPI Command Description
Description
Output data on PSDO is read from RAM starting with byte at ADDR.
ADDR auto increments until PCSZ is raised.
MPU SPI interrupt is generated.
Output data on PSDO is read from RAM starting with byte at ADDR.
ADDR auto increments until PCSZ is raised.
No MPU SPI interrupt is generated.
Input data on PSDI is written to RAM starting with byte at ADDR.
ADDR auto increments until PCSZ is raised.
MPU SPI interrupt is generated.
Input data on PSDI is written to RAM starting with byte at ADDR.
ADDR auto increments until PCSZ is raised.
No MPU SPI interrupt is generated.
CMD
ADDR D0 ... DN
CMD and ADDR are available to the CPU in IORAM.
D0… DN are ignored.
MPU SPI interrupt is generated.
SERIAL READ
8 bit CMD
16 bit Address
DATA[ADDR]
DATA[ADDR+1]
PCSZ
Extended Read . . .
0
7
8
23
24
31
32
39
PSCK
(From Host) PSDI
(From 6531) PSDO
x
C7
C6
C5
C0
HI Z
A15
A14
A1
A0
x
D7
D6
D1
D0
D7
D6
D1
D0
SERIAL WRITE
8 bit CMD
16 bit Address
DATA[ADDR]
DATA[ADDR+1]
PCSZ
Extended Write . . .
0
7
8
23
24
31
32
39
PSCK
(From Host) PSDI
x
C7
C6
C5
C0
A15
A14
A1
A0
D7
D6
D1
D0
D7
D6
D1
D0
x
(From 6531) PSDO
HI Z
Figure 4: SPI Slave Port: Typical Read and Write Operations
Since the addresses are in 16-bit format, any type of XRAM data can be accessed: CE, MPU, or IORAM
but not SFRs or the 80515-internal register bank.
1.19 Test Port
One out of 16 digital or eight analog signals can be selected to be output on the TMUXOUT pin. Refer to
the 78M6631 Programmer’s Reference Manual for more information regarding the use of TMUXOUT.
1.20 UART
The 78M6631 includes one UART (UART0) that can be programmed to communicate with a variety of
external devices. The UART is a dedicated 2-wire serial interfaces (no hardware flow
control/handshaking), which can communicate at rates up to 38,400 bps. All UART transfers are
programmable for parity enable, parity, 2 stop bits/1 stop bit and XON/XOFF options for variable
communication baud rates from 300 to 38,400 bps. Refer to the 78M6631 Programmer’s Reference
Manual for more information regarding the use of the UART resources.
Rev 2
13
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