- 您现在的位置：买卖IC网 > PDF目录1888 > 78P2351R-IMR/F (Maxim Integrated Products)IC LIU NRZ-CMI CONV 155M 56-QFN PDF资料下载
参数资料
| 型号： | 78P2351R-IMR/F |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 26/31页 |
| 文件大小： | 0K |
| 描述： | IC LIU NRZ-CMI CONV 155M 56-QFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 1/1 |
| 规程： | E4，OC-3，STM1-E |
| 电源电压： | 3.15 V ~ 3.45 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-VFQFN 裸露焊盘 |
| 供应商设备封装： | 56-QFN-EP（7x7） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页当前第26页第27页第28页第29页第30页第31页
78P2351R
Serial 155M
NRZ to CMI Converter
Page: 4 of 31
2006 Teridian Semiconductor Corporation
Rev. 2.1
FUNCTIONAL DESCRIPTION
The 78P2351R contains all the necessary transmit
and receive circuitry for connection between
155.52Mbit/s NRZ data sources (STS-3/STM-1) and
CMI encoded electrical interfaces (ES1/STM-1e).
The 78P2351R system interface mimics a 3.3V
optical transceiver module and only requires a
reference clock and wideband transformer to
complete the electrical interface. The chip can be
controlled via control pins or serial port register
settings.
In hardware mode (pin control) the SPSL pin must
be low. Additionally, the following unused pins
must be set accordingly:
SDO pin must be tied low
SDI pin must be tied low
SEN pin must be tied high
In software mode (SPSL pin high), control pins set
register defaults upon power-up or reset. The
78P2351R can then be configured via the 4-wire
serial control interface.
See Pin Descriptions
section for more information.
REFERENCE CLOCK
The 78P2351R requires a reference clock supplied
to the CKREFP/N pins. For reference frequencies of
19.44MHz or 77.76MHz, the device accepts a single
ended CMOS level input at CKREFP (with CKREFN
pin tied to ground).
For reference frequency of
155.52MHz, the device accepts a differential
LVPECL clock input at CKREFP/N. The frequency
of this reference input is selected by either the CKSL
control pin or register bit as follows:
CKSL pin
CKSL[1:0] bits
Reference
Frequency
Low
0 0
19.44MHz
Float
1 0
77.76MHz
High
1 1
155.52MHz
RECEIVER OPERATION
The receiver accepts an ITU-T G.703 compliant CMI
encoded signal at 155.52Mbit/s from the RXP/N
inputs. When properly terminated and transformer-
coupled to the line, the receiver can handle over
12.7dB of cable loss. The receiver’s jitter tolerance
exceeds all relevant standards even with 12.7dB
worth
of
cable
attenuation
and
inter-symbol
interference (ISI). See Receiver Jitter Tolerance
section for more info.
The recovered CMI signal first enters an AGC and
an adaptive equalizer designed to overcome inter-
symbol interference caused by long cable lengths.
The variable gain differential amplifier automatically
controls the gain to maintain a constant voltage level
output regardless of the input voltage level.
The outputs of the data comparators are connected
to the clock recovery circuits. The clock recovery
system employs a Delay Locked Loop (DLL), which
utilizes a line-rate reference frequency derived from
the clock applied to the CKREFP/N pins. After the
clock and data have been recovered, the data is
decoded to binary by the CMI decoder.
The
SODP/N pins output the recovered NRZ data at
LVPECL levels.
Receiver Monitor Mode
The SCK_MON pin or MON register bit puts the
receiver in monitor mode and adds approximately
20dB of flat gain to the receive signal before
equalization. Rx Monitor Mode can handle 20dB of
flat loss typical of monitoring points with up to 6dB
(typical 225ft) of cable loss. Note that Loss of Signal
detection is disabled during Rx Monitor Mode.
Receive Loss of Signal Detect
The 78P2351R includes a Loss of Signal (LOS)
detector.
When the peak value of the received
signal is less than approximately 19dB below
nominal for approximately 110 UI, Receive Loss of
Signal is asserted. The Rx LOS signal is cleared
when
the
received
signal
is
greater
than
approximately 18dB below nominal for 110 UI.
During Rx LOS conditions, the receive clock will
remain on the last phase tap of the Rx DLL
outputting a stable clock while the receive data
outputs are squelched and held at logic ‘0’.
Note: Rx Loss of Signal detection is disabled
during Local Loopback and Receive Monitor
Modes.
相关PDF资料 |
PDF描述 |
|---|---|
| 78P2352-IELR/F | IC LIU SDH SONET 2CH 128-LQFP |
| 78Q2120C09-64CGTR/F | TXRX 10/100 BASE 3.3V 64-LQFP |
| 78Q2133/F | TXRX 10/100 MDIX 3.3V IND 32-QFN |
| 78Q8392LA03-28CHR/F | TXRX 10BASE 2/5 ETH COAX 28-PLCC |
| 78Q8430-100IGT/F | IC LAN MEDIA ACCESS CTLR 100LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 78P2352 | 制造商:TERIDIAN 制造商全称:TERIDIAN 功能描述:Dual Channel OC-3/ STM1-E/ E4 LIU |
| 78P2352-DB/CMI | 功能描述:BOARD DEMO 78P2352 COAX CABLE RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- 主要目的:电源管理，电池充电器 嵌入式:否 已用 IC / 零件:MAX8903A 主要属性:1 芯锂离子电池 次要属性:状态 LED 已供物品:板 |
| 78P2352-DB-CMI | 功能描述:界面开发工具 78P2352 Demo Brd For Coax Cable RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| 78P2352-IEL | 制造商:TERIDIAN 制造商全称:TERIDIAN 功能描述:Dual Channel OC-3/ STM1-E/ E4 LIU |
| 78P2352-IEL/F | 功能描述:接口 - 专用 Dual Ch OC-3/STM1-1e/E4 LIU RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
发布紧急采购，3分钟左右您将得到回复。