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| 型号： | 85408BGI |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 85408 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 封装： | 4.40 X 7.80 MM, 0.925 MM HEIGHT, MO-153, TSSOP-24 |
| 文件页数： | 2/16页 |
| 文件大小： | 755K |
| 代理商： | 85408BGI |
ICS85408I Datasheet
LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
ICS85408BGI REVISION B JULY 2, 2009
10
2009 Integrated Device Technology, Inc.
Differential Clock Input Interface
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both signals must meet the VPP and
VCMR input requirements. Figures 2A to 2F show interface
examples for the HiPerClockS CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here are
examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example, in Figure 2A, the input termination applies for IDT
HiPerClockS open emitter LVHSTL drivers. If you are using an
LVHSTL driver from another vendor, use their termination
recommendation.
2A. HiPerClockS CLK/nCLK Input Driven by an IDT
Open Emitter HiPerClockS LVHSTL Driver
Figure 3C. HiPerClockS CLK/nCLK Input
Driven by a 3.3V LVPECL Driver
Figure 2E. HiPerClockS CLK/nCLK Input
Driven by a 3.3V HCSL Driver
Figure 2B. HiPerClockS CLK/nCLK Input
Driven by a 3.3V LVPECL Driver
Figure 2D. HiPerClockS CLK/nCLK Input
Driven by a 3.3V LVDS Driver
Figure 2F. HiPerClockS CLK/nCLK Input
Driven by a 2.5V SSTL Driver
R1
50
R2
50
1.8V
Zo = 50
Zo = 50
CLK
nCLK
3.3V
LVHSTL
IDT
HiPerClockS
LVHSTL Driver
HiPerClockS
Input
R3
125
R4
125
R1
84
R2
84
3.3V
Zo = 50
Zo = 50
CLK
nCLK
3.3V
LVPECL
HiPerClockS
Input
HCSL
*R3
33
*R4
33
CLK
nCLK
2.5V
3.3V
Zo = 50
Zo = 50
HiPerClockS
Input
R1
50
R2
50
*Optional – R3 and R4 can be 0
CLK
nCLK
HiPerClockS
Input
LVPECL
3.3V
Zo = 50
Zo = 50
3.3V
R1
50
R2
50
R2
50
3.3V
R1
100
LVDS
CLK
nCLK
3.3V
Receiver
Zo = 50
Zo = 50
CLK
nCLK
HiPerClockS
SSTL
2.5V
Zo = 60
Zo = 60
2.5V
3.3V
R1
120
R2
120
R3
120
R4
120
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 85408BGILF | 功能描述:时钟缓冲器 Low Skew 1-to-8 Diff to LVDS Clock Dist RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 85408BGILF-HT | 制造商:Integrated Device Technology Inc 功能描述:CLOCK BFFR 16-OUT 24TSSOP - Rail/Tube |
| 85408BGILFT | 功能描述:时钟驱动器及分配 Low Skew 1-to-8 Diff to LVDS Clock Dist RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| 85408BGIT | 制造商:Integrated Device Technology Inc 功能描述:85408BGIT - Tape and Reel |
| 85408BGLF | 功能描述:时钟缓冲器 Low Skew 1-to-8 Diff to LVDS Clock Dist RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
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