参数资料
型号: 866
厂商: B&K Precision
文件页数: 136/172页
文件大小: 0K
描述: PROGRAMMER UNIV W/ USB INTERFACE
标准包装: 1
类型: 通用
适用于相关产品: EPROM、EEPROM 闪存、串行 EPROM、微控制器和 PLD
所含物品: 编程器、适配器、缆线、手册和软件
其它名称: 866BK
Q2005647
3. run PG4UW, select device e.g.: Xilinx XC2x32A
[QFG32](Jam), load Jam file (Files of type: select
STAPL File)
4. choose “Device operation option Alt+O” press button
“Jam configuration”. Warning “Select device from menu
"Select Devices" and Jam file is probably different!
Continue?” choose Yes. (Xilinx sw. does not include
line: NOTE "DEVICE" "XC2x32A"; in Jam file). In dialog
“Jam player” select action and procedures, finish
dialogs, press button “Play Jam” from toolbar and read
Log window
The ispVM Virtual Machine is a Virtual Machine that has
been optimized specifically for programming devices which are
compatible with the IEEE 1149.1 Standard for Boundary Scan
Test. The ispVM EMBEDDED tool combines the power of
Lattice's ispVM Virtual MachineTM with the industry-standard
Serial Vector Format (SVF) language for Boundary Scan
programming and test.
The ispVM System software generates VME files supporting
both ispJTAG and non-Lattice JTAG files which are compliant
to the IEEE 1149.1 standard and support SVF or IEEE 1532
formats. The VME file is a hex coded file that takes the chain
information from the ispVM System window. The devices can
be programmed in ZIF socket of the programmer or in target
system
through
ISP connector. It is indicated by
[PLCC44](VME) or (ISP-VME) suffix after name of selected
device in control program. Multiple devices are possible to
program and test via JTAG chain: JTAG chain (ISP-VME).
More information on the website:
In-System Programmability Guidelines
Software tools:
Lattice: ispLEVER, ispVM System ISP Programming
Software, PAC-Designer
Software,
svf2vme utility
(converts a serial vector file to a VME file)
Device / Device info
The command provides additional information about the
current device - size of device, organization, programming
algorithm and a list of programmers (including auxiliary
modules) that supported this device. You can find here
package information part number description and full
information for ISP implementation. For example: description of
ISP connector pins for currently selected chip, recommended
target design around in-circuit programmed chip.
136
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867156-1 CONN RECEPT LGH 1POS
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