参数资料
型号: 88EM8081XX-SAG2C000-T
厂商: MARVELL SEMICONDUCTOR INC
元件分类: 稳压器
英文描述: 2 A POWER FACTOR CONTROLLER, 120 kHz SWITCHING FREQ-MAX, PDSO8
封装: GREEN, SOIC-8
文件页数: 13/64页
文件大小: 667K
代理商: 88EM8081XX-SAG2C000-T
88EM8080/88EM8081
Datasheet
Doc. No. MV-S106340-01 Rev. B
Copyright 2010 Marvell
Page 20
Document Classification: Proprietary
August 6, 2010, Preliminary Information
3.2
VDD – Bias Power Input
The controller needs bias power which is recieved through the VDD and PGND pins. The nominal
voltage for the VDD pin is around 12 Volts and the IC will start switching as long as the VDD voltage
exceeds the VDD_ON Power-on threshold described in Table 4, Electrical Characteristics, on
page 16. The PWM switched output at the SW pin is available after the IC is switched on. Once
powered up and switching has started, the VDD voltage can reach as low as 7 Volts (typical), at
which point the IC is switched off. This 7 volt threshold is the under voltage lockout (UVLO) value.
Once VDD goes below the UVLO threshold voltage, VDD must climb back to the VDD_ON threshold
to start switching once again. The maximum voltage needs to be less than 16 volts which provides
some margin from an absolute maximum VDD voltage rating of 18 Volts. When the IC is not
switching (less than 12 volts before turn-on and less than 7 volts after turn-on), the
88EM8080/88EM8081 draws very little quiescent current which has a typical rating of 95
μA. During
switching, the operating current from the VDD source is around 5.2mA.
From a circuit design point of view, bias can be provided initially from the rectified low frequency AC
input. Once the IC starts switching, bias power can be derived from the high frequency part of the
circuit. As an example, an auxiliary winding on the flyback transformer can be used to provide this
high frequency power. It is necessary to rectify the high frequency AC from the auxiliary winding and
to have necessary filtering to reduce the high frequency ripple at the VDD pin. This approach of
providing high frequency bias power after turn-on will improve the efficiency of the bias power
circuitry in the steady state. It should be noted that during startup, at the instant of switching, the
current drawn by the chip increases from 95
μA to 5.2mA (typical). This sudden step load of bias
power will tend to decrease the VDD voltage. If the VDD voltage falls below 7 volts due to this
reason, the IC will go through another starting cycle. To prevent this hiccup, adequate energy
storage (capacitor) needs to be provided. The capacitors across VDD and PGND will help to keep
the VDD voltage above 7 volts.
Care is also needed in the design of bias power circuit from the rectified low frequency AC side. If a
simple resistance is used to charge the capacitor across VDD and PGND, the turn-on time could be
longer. Variations in the bias circuit design may be accommodated to meet the specified turn-on
time.
The under voltage lockout (UVLO) feature can be used to shut off the IC during a fault condition by
forcing the VDD voltage to go below 7 volts. If the fault is removed, VDD voltage can be allowed to
increase to VDD_ON and the IC will go through a new starting cycle.
3.3
PGND and SGND
The 88EM8080/88EM8081 has separated the power ground pin (PGND) and signal ground pin
(SGND) inside the IC to avoid any noise interruption during signal processing. The PGND pin should
be connected to the primary MOSFET source pin and the connection trace should be as short as
possible. The SGND must be connected to the PGND through a Kelvin sensing connection trace to
achieve a clean signal ground.
3.4
SW – Switched PWM Output for Gate Drive
The SW pin is the PWM output pin for the IC. The IC has an internal totem pole drive circuit to drive
the gate of an external power MOSFET through this SW pin. A gate resistor is recommended to
provide damping in the external drive circuit and to minimize the parasitic ringing. The PWM output
gate drive capibility is 1.2A (typical). If necessary, additional drive circuitry along with speed up
circuitry can be added to the SW pin output for very high power levels.
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