- 您现在的位置：买卖IC网 > PDF目录24634 > 932S421BGLF (INTEGRATED DEVICE TECHNOLOGY INC) 333.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 PDF资料下载
参数资料
| 型号： | 932S421BGLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 333.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-56 |
| 文件页数： | 8/23页 |
| 文件大小： | 220K |
| 代理商： | 932S421BGLF |
IDTTM
PCIe Gen2 and QPI Clock for Intel-Based Servers
1340G—01/26/10
ICS932S421B
PCIe Gen2 and QPI Clock for Intel-Based Servers
16
SMBus Table: CPU Frequency Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
CPU N Div8
N Divider Prog bit 8
RW
X
Bit 6
CPU N Div9
N Divider Prog bit 9
RW
X
Bit 5
CPU M Div5
RW
X
Bit 4
CPU M Div4
RW
X
Bit 3
CPU M Div3
RW
X
Bit 2
CPU M Div2
RW
X
Bit 1
CPU M Div1
RW
X
Bit 0
CPU M Div0
RW
X
SMBus Table: CPU Frequency Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
CPU N Div7
RW
X
Bit 6
CPU N Div6
RW
X
Bit 5
CPU N Div5
RW
X
Bit 4
CPU N Div4
RW
X
Bit 3
CPU N Div3
RW
X
Bit 2
CPU N Div2
RW
X
Bit 1
CPU N Div1
RW
X
Bit 0
CPU N Div0
RW
X
SMBus Table: CPU Spread Spectrum Control Register
Byte 13
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
CPU SSP7
RW
X
Bit 6
CPU SSP6
RW
X
Bit 5
CPU SSP5
RW
X
Bit 4
CPU SSP4
RW
X
Bit 3
CPU SSP3
RW
X
Bit 2
CPU SSP2
RW
X
Bit 1
CPU SSP1
RW
X
Bit 0
CPU SSP0
RW
X
SMBus Table: CPU Spread Spectrum Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
0
Bit 6
CPU SSP14
RW
X
Bit 5
CPU SSP13
RW
X
Bit 4
CPU SSP12
RW
X
Bit 3
CPU SSP11
RW
X
Bit 2
CPU SSP10
RW
X
Bit 1
CPU SSP9
RW
X
Bit 0
CPU SSP8
RW
X
-
Byte 11
-
Spread Spectrum
Programming bit(14:8)
Reserved
These Spread Spectrum bits in
Byte 13 and 14 will program the
spread pecentage of CPU
-
Byte 12
Byte 14
The decimal representation of
M and N Divider in Byte 11 and
12 will configure the CPU VCO
frequency. Default at power up
= latch-in or Byte 0 Rom table.
VCO Frequency = 14.318 x
[NDiv(9:0)+8] / [MDiv(5:0)+2]
M Divider Programming
bit (5:0)
These Spread Spectrum bits in
Byte 13 and 14 will program the
spread pecentage of CPU
The decimal representation of
M and N Divider in Byte 11 and
12 will configure the CPU VCO
frequency. Default at power up
= latch-in or Byte 0 Rom table.
VCO Frequency = 14.318 x
[NDiv(9:0)+8] / [MDiv(5:0)+2]
Spread Spectrum
Programming bit(7:0)
N Divider Programming
Byte12 bit(7:0) and
Byte11 bit(7:6)
相关PDF资料 |
PDF描述 |
|---|---|
| 932S421BGLFT | 333.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S421BFLFT | 333.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S421CGLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S421CFLFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S421CGLFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 932S421BGLFT | 功能描述:时钟合成器/抖动清除器 CK410B+ SERVER MAIN CLOCK RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 932S421CFLF | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 932S421CFLFT | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 932S421CGLF | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 932S421CGLFT | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。