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参数资料
| 型号： | 932S421CFLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | ROHS COMPLIANT, MO-118, SSOP-56 |
| 文件页数： | 1/23页 |
| 文件大小： | 242K |
| 代理商： | 932S421CFLFT |
Integrated
Circuit
Systems, Inc.
ICS932S421C
1460E—08/25/09
Pin Configuration
Recommended Application:
PCIe Gen 2 & QPI compliant CK410B+ clock for Intel-based
servers
Output Features:
4 - 0.7V current-mode differential CPU pairs
5 - 0.7V current-mode differential SRC pair
4 - PCI (33MHz)
3 - PCICLK_F, (33MHz) free-running
1 - 48MHz
2 - REF, 14.318MHz
Features/Benefits:
Supports spread spectrum modulation, 0 to -0.5%
down spread
Uses external 14.318MHz crystal and external load
capacitors for low ppm synthesis error
CPU clocks independent of SRC/PCI clocks
D2/D3 SMBus address
Increased CPU amplitude at higher speeds compared
to 932S421B
PCIe Gen 2 and QPI Clock for Intel-based Servers
Functionality
Key Specifications:
PCIe Gen 2 compliant SRC outputs
QPI & FBD 2 compliant CPU clocks
CPU cycle-cycle jitter: < 50ps
SRC cycle-cycle jitter: < 125ps
PCI cycle-cycle jitter: < 500ps
CPU output skew: < 50ps
SRC output skew: < 250ps
± 100ppm frequency accuracy on all outputs
56-pin SSOP & TSSOP
FS_C
1
FS_B
1
FS_A
2
CPU
MHz
SRC
MHz
PCI
MHz
REF
MHz
USB
MHz
0
266.67
0
1
133.33
0
1
0
200.00
0
1
166.67
1
0
333.33
1
0
1
100.00
1
0
400.00
11
1
Reserved
1. FS_B and FS_C are three-level inputs. Please see V
IL_FS and VIH_FS specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
2. FS_A is a low-threshold input. Please see the V
IL_FS and VIH_FS
specifications in the Input/Supply/Common Output Parameters Table for correct values.
100.00
33.33
14.32
48.00
VDDPCI 1
56 FS_C/TEST_SEL
GNDPCI 2
55 REF0
PCICLK0 3
54 REF1
PCICLK1 4
53 VDDREF
PCICLK2 5
52 X1
PCICLK3 6
51 X2
GNDPCI 7
50 GNDREF
VDDPCI 8
49 FS_B/TEST_MODE
PCICLK_F0 9
48 FS_A
PCICLK_F1 10
47 VDDCPU
PCICLK_F211
46CPUCLKT0
VDD48 12
45 CPUCLKC0
48MHz 13
44 VDDCPU
GND48 14
43 CPUCLKT1
VDDSRC 15
42 CPUCLKC1
SRCCLKT0 16
41 GNDCPU
SRCCLKC0 17
40 CPUCLKT2
SRCCLKC1 18
39 CPUCLKC2
SRCCLKT1 19
38 VDDCPU
GNDSRC 20
37 CPUCLKT3
SRCCLKT2 21
36 CPUCLKC3
SRCCLKC2 22
35 VDDA
SRCCLKC3 23
34 GNDA
SRCCLKT3 24
33 IREF
VDDSRC 25
32 NC
SRCCLKT4 26
31 Vtt_PwrGd#/PD
SRCCLKC4 27
30 SDATA
VDDSRC 28
29 SCLK
IC
S
932S
421
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 932S421CGLF | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 932S421CGLFT | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 932S422CFLF | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 932S422CFLFT | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 932S422CGLF | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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