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参数资料
| 型号： | 935269568118 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16 I/O, PIA-GENERAL PURPOSE, PDSO24 |
| 封装： | 5.30 MM, PLASTIC, MO-150, SOT-340-1, SSOP-24 |
| 文件页数： | 16/17页 |
| 文件大小： | 151K |
| 代理商： | 935269568118 |
Philips
Semiconductors
Product
data
PCA9555
16-bit
I
2
C
and
SMBus
I/O
port
with
interrupt
8
2002
Jul
26
1
0
A2
A1 A0
0
A2
A1
A0
0
1
S0
A
COMMAND BYTE
acknowledge
from slave
R/W
acknowledge
from slave
A
P
NA
acknowledge
from slave
acknowledge
from master
S
DATA
R/W
first byte
at this moment master-transmitter
becomes master-receiver and
slave-receiver becomes
slave-transmitter
last byte
SU01463
no acknowledge
from master
1
slave address
data from upper
or lower byte of
register
data from lower
or upper byte
of register
slave address
MSB
LSB
MSB
LSB
NOTE: Transfer can be stopped at any time by a STOP condition.
Figure 8.
READ from register
12345
6789
S
0100
A2
A1
A0
1
A
7
6543210
A
I0.x
7
6543210
A
I1.x
7
6
543210
A
I0.x
7
6
5
43210
1
I1.x
P
R/W
ACKNOWLEDGE
FROM SLAVE
SCL
SDA
ACKNOWLEDGE
FROM MASTER
ACKNOWLEDGE
FROM MASTER
ACKNOWLEDGE
FROM MASTER
NON ACKNOWLEDGE
FROM MASTER
READ FROM PORT 0
DATA INTO PORT 0
READ FROM PORT 1
DATA INTO PORT 1
INT
tIR
tIV
SU01464
NOTES: Transfer of data can be stopped at any moment by a STOP condition. When this occurs, data present at the latest acknowledge phase is valid (output mode).
It is assumed that the command byte has previously been set to 00 (read input port port register).
Figure 9.
READ input port register — scenario 1
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