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参数资料
| 型号： | 935269568118 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16 I/O, PIA-GENERAL PURPOSE, PDSO24 |
| 封装： | 5.30 MM, PLASTIC, MO-150, SOT-340-1, SSOP-24 |
| 文件页数： | 4/17页 |
| 文件大小： | 151K |
| 代理商： | 935269568118 |
Philips Semiconductors
Product data
PCA9555
16-bit I2C and SMBus I/O port with interrupt
2002 Jul 26
12
SDA
SCL
SU01469
tHD;STA
tF
S
tLOW
tR
tHD;DAT
tSU;DAT
tHIGH
tF
tSU;STA
SR
tHD;STA
tSP
tSU;STD
P
tR
tBUF
S
Figure 11. Definition of timing
AC SPECIFICATIONS
SYMBOL
PARAMETER
STANDARD MODE
I2C BUS
FAST MODE
I2C BUS
UNITS
MIN
MAX
MIN
MAX
fSCL
Operating frequency
0
100
0
400
kHz
tBUF
Bus free time between STOP and START conditions
4.7
—
1.3
—
s
tHD;STA
Hold time after (repeated) START condition
4.0
—
0.6
—
s
tSU;STA
Repeated START condition setup time
4.7
—
0.6
—
s
tSU;STO
Setup time for STOP condition
4.0
—
0.6
—
s
tVD;ACK
Valid time of ACK condition2
0.3
3.45
0.1
0.9
s
tHD;DAT
Data in hold time
0
—
0
—
ns
tVD;DAT
Data out valid time3
300
—
50
—
ns
tSU;DAT
Data setup time
250
—
100
—
ns
tLOW
Clock LOW period
4.7
—
1.3
—
s
tHIGH
Clock HIGH period
4.0
—
0.6
—
s
tF
Clock/Data fall time
—
300
20 + 0.1Cb 1
300
ns
tR
Clock/Data rise time
—
1000
20 + 0.1Cb 1
300
ns
tSP
Pulse width of spikes that must be suppressed by the input
filters
—
50
—
50
ns
Port Timing
tPV
Output data valid
—
200
—
200
ns
tPS
Input data setup time
150
—
150
—
ns
tPH
Input data hold time
1
—
1
—
s
Interrupt Timing
tIV
Interrupt valid
—
4
—
4
s
tIR
Interrupt reset
—
4
—
4
s
NOTES:
1. Cb = total capacitance of one bus line in pF.
2. tVD;ACK = time for Acknowledgement signal from SCL low to SDA (out) low.
3. tVD;DAT = minimum time for SDA data out to be valid following SCL low.
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