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参数资料
型号： 94227AFLF
厂商： INTEGRATED DEVICE TECHNOLOGY INC
元件分类： 时钟产生/分配
英文描述： 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封装： 0.300 INCH, GREEN, MO-118, SSOP-48
文件页数： 17/18页
文件大小： 151K
代理商： 94227AFLF
8
ICS94227
0446B—12/20/02
Byte 13:VCO Spread Sectrum Control Register
Byte 14: VCO Spread Sectrum Control Register
Note: Please utilize software utility provided by ICS
Application Engineering to configure spread
spectrum. Incorrect spread percentage may cause
system failure.
t
i
BD
W
Pn
o
i
t
p
i
r
c
s
e
D
7
t
i
BX
7
t
i
B
m
u
r
t
c
e
p
S
d
a
e
r
p
S
6
t
i
BX
6
t
i
B
m
u
r
t
c
e
p
S
d
a
e
r
p
S
5
t
i
BX
5
t
i
B
m
u
r
t
c
e
p
S
d
a
e
r
p
S
4
t
i
BX
4
t
i
B
m
u
r
t
c
e
p
S
d
a
e
r
p
S
3
t
i
BX
3
t
i
B
m
u
r
t
c
e
p
S
d
a
e
r
p
S
2
t
i
BX
2
t
i
B
m
u
r
t
c
e
p
S
d
a
e
r
p
S
1
t
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BX
1
t
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B
m
u
r
t
c
e
p
S
d
a
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r
p
S
0
t
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BX
0
t
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B
m
u
r
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c
e
p
S
d
a
e
r
p
S
Note: Please utilize software utility provided by ICS
Application Engineering to configure spread
spectrum. Incorrect spread percentage may cause
system failure.
t
i
BD
W
Pn
o
i
t
p
i
r
c
s
e
D
7
t
i
BX
d
e
v
r
e
s
e
R
6
t
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BX
1
_
O
I
T
A
R
5
t
i
BX
0
_
O
I
T
A
R
4
t
i
BX
2
1
t
i
B
m
u
r
t
c
e
p
S
d
a
e
r
p
S
3
t
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BX
1
t
i
B
m
u
r
t
c
e
p
S
d
a
e
r
p
S
2
t
i
BX
0
1
t
i
B
m
u
r
t
c
e
p
S
d
a
e
r
p
S
1
t
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BX
9
i
B
m
u
r
t
c
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p
S
d
a
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r
p
S
0
t
i
BX
8
t
i
B
m
u
r
t
c
e
p
S
d
a
e
r
p
S
Byte 15: Output Skew Control
Byte 16: Output Skew Control
t
i
BD
W
Pn
o
i
t
p
i
r
c
s
e
D
7
t
i
B0
l
o
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t
n
o
C
w
e
k
S
2
K
L
C
U
P
C
6
t
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B0
5
t
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B0
l
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t
n
o
C
w
e
k
S
)
0
:
1
(
K
L
C
U
P
C
4
t
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B0
3
t
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B0
l
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t
n
o
C
w
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k
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)
F
,
0
:
3
(
K
L
C
I
C
P
2
t
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B0
1
t
i
B0
0
t
i
B1
t
i
BD
W
Pn
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t
p
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7
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B0
l
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)
4
:
7
(
K
L
C
I
C
P
6
t
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B0
5
t
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B0
4
t
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B1
3
t
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B0
l
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C
w
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)
0
:
2
(
P
G
A
2
t
i
B0
1
t
i
BX
d
e
v
r
e
s
e
R
0
t
i
BX
d
e
v
r
e
s
e
R
Byte 17: Slew Rate Control Register
Byte 18: Output Rise/Fall Time Select Register
t
i
BD
W
Pn
o
i
t
p
i
r
c
s
e
D
7
t
i
B1
0
K
L
C
U
P
C
6
t
i
B0
5
t
i
B1
1
K
L
C
U
P
C
4
t
i
B0
3
t
i
B1
2
K
L
C
U
P
C
2
t
i
B0
1
t
i
B1
l
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)
0
.
2
(
P
G
A
0
t
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B0
t
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7
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B1
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)
0
:
3
(
I
C
P
6
t
i
B0
5
t
i
B1
l
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C
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R
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)
4
:
7
(
I
C
P
4
t
i
B0
3
t
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B1
l
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n
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C
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t
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:
z
H
M
8
4
2
t
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B0
1
t
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:
z
H
M
8
4
_
4
2
0
t
i
B0
Notes:
1. PWD = Power on Default
2. The power on default for byte 13-20 depends on the harware (latch inputs FS[0:4]) or I
2C (Byte 0 bit [1:7]) setting.
Be sure to read back and re-write the values of these 8 registers when VCO frequency change is desired for the first
pass.
3. If Byte 8 bit 7 is driven to "1" meaning programming is intended, Byte 21-24 will lose their default power up value.
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94228BFLF 233.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
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