参数资料
型号: 9DB106BGILFT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
封装: 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-28
文件页数: 14/14页
文件大小: 152K
代理商: 9DB106BGILFT
IDT
Six Output Differential Buffer for PCIe Gen 2
9DB106
REV K 04/20/11
9DB106
Six Output Differential Buffer for PCIe Gen 2
9
General SMBus serial interface information for the 9DB106
How to Write:
Controller (host) sends a start bit.
Controller (host) sends the write address D4
(h)
IDT clock will
acknowledge
Controller (host) sends the begining byte location = N
IDT clock will
acknowledge
Controller (host) sends the data byte count = X
IDT clock will
acknowledge
Controller (host) starts sending
Byte N through
Byte N + X -1)
IDT clock will
acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send start bit.
Controller (host) sends the write address D4
(h)
IDT clock will
acknowledge
Controller (host) sends the begining byte
location = N
IDT clock will
acknowledge
Controller (host) will send a separate start bit.
Controller (host) sends the read address D5
(h)
IDT clock will
acknowledge
IDT clock will send the data byte count = X
IDT clock sends
Byte N + X -1
IDT clock sends
Byte 0 through byte X (if X
(h)
was written to byte 8).
Controller (host) will need to acknowledge each byte
Controllor (host) will send a not acknowledge bit
Controller (host) will send a stop bit
IDT (Slave/Receiver)
T
WR
ACK
PstoP bit
X
By
te
Index Block Write Operation
Slave Address D4(h)
Beginning Byte = N
WRite
starT bit
Controller (Host)
Byte N + X - 1
Data Byte Count = X
Beginning Byte N
T
starT bit
WR
WRite
RT
Repeat starT
RD
ReaD
Beginning Byte N
Byte N + X - 1
N
Not acknowledge
PstoP bit
Slave Address D5(h)
Index Block Read Operation
Slave Address D4(h)
Beginning Byte = N
ACK
Data Byte Count = X
ACK
IDT (Slave/Receiver)
Controller (Host)
X
By
te
ACK
相关PDF资料
PDF描述
9DB106BGILF 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
9DB106BFILFT 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
9DB108BFLF 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
9DB108BGLFT 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
9DB108BFLF-T 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
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