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| 型号： | 9DB1233AGLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO64 |
| 封装： | 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-64 |
| 文件页数： | 1/15页 |
| 文件大小： | 181K |
| 代理商： | 9DB1233AGLF |
9DB1233
IDT Twelve Output Differential Buffer for PCIe Gen3
1675B—11/08/10
Twelve Output Differential Buffer for PCIe Gen3
DATASHEET
1
General Description
Output Features
The 9DB1233 zero-delay buffer supports PCIe Gen3
requirements, while being backwards compatible to PCIe Gen2
and Gen1. The 9DB1233 is driven by a differential SRC output
pair from an IDT 932S421 or 932SQ420 or equivalent main
clock generator. It attenuates jitter on the input clock and has a
selectable PLL bandwidth to maximize performance in systems
with or without Spread-Spectrum clocking.
12 - 0.7V current mode differential HSCL output pairs
Functional Block Diagram
Key Specifications
Output cycle-cycle jitter < 50ps.
Output-to-output skew < 50 ps
PCIe Gen3 phase jitter < 1.0ps RMS
Pin compatible with DB1200 Yellow Cover Device
Features/Benefits
3 Selectable SMBus Addresses/Mulitple devices can share
the same SMBus Segment
12 OE# pins/Hardware control of each output
PLL or bypass mode/PLL can dejitter incoming clock
Selectable PLL bandwidth/minimizes jitter peaking in
downstream PLL's
Spread Spectrum Compatible/tracks spreading input clock
for low EMI
SMBus Interface/unused outputs can be disabled
Supports undriven differential outputs in Power Down mode
for power management
Recommended Application
12 output PCIe Gen3 zero-delay/fanout buffer
DIF_IN
DIF_IN#
DIF(11:0))
CONTROL
LOGIC
BYPASS#/PLL
SMBDAT
SMBCLK
VTTPWRGD#/PD
SPREAD
COMPATIBLE
PLL
12
IREF
OE_(11:0)#
12
HIGH_BW#
M
U
X
ADR_SEL
相关PDF资料 |
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| 9DB1904BKLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 19 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 |
| 9DB1933AKLF | 9DB SERIES, PLL BASED CLOCK DRIVER, 19 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 |
| 9DB1933AKLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 19 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 9DB1233AGLFT | 功能描述:时钟缓冲器 12 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB1904B | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:19 Output Differential Buffer for PCIe Gen2 and QPI |
| 9DB1904BKLF | 功能描述:时钟缓冲器 19 OUTPUT PCIE GEN2 BUFFER w/QPI RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB1904BKLFT | 功能描述:时钟缓冲器 19 OUTPUT PCIE GEN2 BUFFER w/QPI RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB1933 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:Nineteen Output Differential Buffer for PCIe Gen3 |
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