- 您现在的位置：买卖IC网 > PDF目录25564 > 9DB801CFLF (INTEGRATED DEVICE TECHNOLOGY INC) 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 PDF资料下载
参数资料
| 型号： | 9DB801CFLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封装： | ROHS COMPLIANT, MO-153, SSOP-48 |
| 文件页数： | 19/20页 |
| 文件大小： | 277K |
| 代理商： | 9DB801CFLF |
8
Integrated
Circuit
Systems, Inc.
ICS9DB801
1015B—09/07/06
Electrical Characteristics - DIF 0.7V Current Mode Differential Pair
TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL =2pF, RS=33.2
, R
P=49.9
, Ι
REF
= 475
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Current Source Output
Impedance
Zo
1
VO = Vx
3000
1
Voltage High
VHigh
660
850
1,3
Voltage Low
VLow
-150
150
1,3
Max VoltageVovs
1150
1
Min Voltage
Vuds
-300
1
Crossing Voltage (abs)
Vcross(abs)
250
550
mV
1
Crossing Voltage (var)
d-Vcross
Variation of crossing over all
edges
140
mV
1
Long Accuracy
ppmsee Tperiod min-max values
0
ppm1,2
Rise Time
tr
VOL = 0.175V, VOH = 0.525V
175
700
ps
1
Fall Time
tf
VOH = 0.525V VOL = 0.175V
175
700
ps
1
Rise Time Variation
d-tr
125
ps
1
Fall Time Variation
d-tf
125
ps
1
Duty Cycle
dt3
Measurement from differential
wavefrom
45
55
%
1
Skew
tsk3
VT = 50%
50
ps
1
PLL mode,
Measurement from differential
wavefrom
50
ps
1
BYPASS mode as additive jitter
50
ps
1
1Guaranteed by design and characterization, not 100% tested in production.
3I
REF = VDD/(3xRR). For RR = 475
(1%), I
REF = 2.32mA. IOH = 6 x IREF and VOH = 0.7V @ ZO=50
.
2 All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that the input clock
complies with CK409/CK410 accuracy requirements
Jitter, Cycle to cycle
tjcyc-cyc
Statistical measurement on single
ended signal using oscilloscope
math function.
mV
Measurement on single ended
signal using absolute value.
mV
相关PDF资料 |
PDF描述 |
|---|---|
| 9DB801BFLF | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9DB801BGLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9DB801CFLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9DB801CGLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9DB803DFILFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 9DB801CFLFT | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Buffer Single 50MHz to 200MHz 48-Pin SSOP T/R 制造商:Integrated Device Technology Inc 功能描述:9DB801CFLFT - Tape and Reel |
| 9DB801CGLF | 功能描述:时钟缓冲器 8 OUTPUT PCIE GEN1 BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB801CGLFT | 功能描述:时钟缓冲器 8 OUTPUT PCIE GEN1 BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB803DFILF | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB803DFILFT | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。