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参数资料
| 型号： | 9EX21801AKLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | PLL BASED CLOCK DRIVER, PQCC72 |
| 封装： | ROHS COMPLIANT, PLASTIC, MLF-72 |
| 文件页数： | 11/14页 |
| 文件大小： | 160K |
| 代理商： | 9EX21801AKLFT |
IDTTM
18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
1463B — 01/20/10
ICS9EX21801A
18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
6
Datasheet
Electrical Characteristics - Clock Input Parameters
TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Input High Voltage -
DIF_IN
VIHDIF
Differential inputs
(single-ended measurement)
600
800
1150
mV
1
Input Low Voltage -
DIF_IN
VILDIF
Differential inputs
(single-ended measurement)
VSS - 300
0
300
mV
1
Input Common Mode
Voltage - DIF_IN
VCOM
Common Mode Input Voltage
300
1000
mV
1
Input Amplitude - DIF_IN
VSWING
Peak to Peak value
300
1450
mV
1
Input Slew Rate - DIF_IN
dv/dt
Measured differentially
0.4
8
V/ns
1,2
Input Leakage Current
IIN
VIN = VDD , VIN = GND
-5
5
uA
1
Input Duty Cycle
dtin
Measurement from differential
wavefrom
45
55
%
1
Input Jitter - Cycle to
Cycle
JDIFIn
Differential Measurement
0
125
ps
1
1 Guaranteed by design and characterization, not 100% tested in production.
Electrical Characteristics - DIF 0.7V Current Mode Differential Pairs
TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL =2pF, RS=33.2, RP=49.9, RREF=475, 10 inch transmission lines
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Current Source Output
Impedance
Zo
1
VO = Vx
3000
1
Voltage High
VHigh
660
850
1,3
Voltage Low
VLow
-150
150
1,3
Max Voltage
Vovs
1150
1
Min Voltage
Vuds
-300
1
Crossing Voltage (abs)
Vcross(abs)
250
550
mV
1
Crossing Voltage (var)
d-Vcross
Variation of crossing over all edges
140
mV
1
Long Accuracy
ppm
see Tperiod min-max values
0
ppm
1,2
Rise Time
tr
VOL = 0.175V, VOH = 0.525V
175
700
ps
1
Fall Time
tf
VOH = 0.525V VOL = 0.175V
175
700
ps
1
Rise Time Variation
d-tr
125
ps
1
Fall Time Variation
d-tf
125
ps
1
Duty Cycle
dt3
Measurement from differential
wavefrom
45
55
%
1
PLL mode
50
ps
1,5
BYPASS mode as additive jitter
50
ps
1,4
1Guaranteed by design and characterization, not 100% tested in production.
3I
REF = VDD/(3xRR). For RR = 475 (1%), IREF = 2.32mA. IOH = 6 x IREF and VOH = 0.7V @ ZO=50.
4 Applies to Bypass Mode Only
Jitter, Cycle to cycle
tjcyc-cyc
2 All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with
CK410B+/CK509B accuracy requirements. The 9EX21801 itself does not contribute to ppm error.
mV
Statistical measurement on single
ended signal using oscilloscope math
function.
mV
Measurement on single ended signal
using absolute value.
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相关代理商/技术参数 |
参数描述 |
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| 9F-110 | 制造商:NA 功能描述: |
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