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参数资料
| 型号： | 9LPRS464YGLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 240 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153N, TSSOP-56 |
| 文件页数： | 4/23页 |
| 文件大小： | 246K |
| 代理商： | 9LPRS464YGLFT |
12
ICS9LPRS464
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUss
IDTTM/ICSTM
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUs
1377A—04/07/08
Table 4: CPU Divider Ratios
B19b(7:4)
Bit
00
01
10
11
MSB
00
0000
2
0100
4
1000
8
1100
16
01
0001
3
0101
6
1001
12
1101
24
10
0010
5
0110
10
1010
20
1110
40
11
0011
15
0111
30
1011
60
1111
120
LSB
Address
Div
Address
Div
Address
Div
Table 5: HTT Divider Ratios
B20b(3:0)
Bit
00
01
10
11
MSB
00
0000
4
0100
8
1000
16
1100
32
01
0001
3
0101
6
1001
12
1101
24
10
0010
5
0110
10
1010
20
1110
40
11
0011
15
0111
30
1011
60
1111
120
LSB
Address
Div
Address
Div
Address
Div
Table 6: ATIG Divider Ratios
B19b(3:0)
Bit
00
01
10
11
MSB
00
0000
2
0100
4
1000
8
1100
16
01
0001
3
0101
6
1001
12
1101
24
10
0010
5
0110
10
1010
20
1110
40
11
0011
7
0111
14
1011
28
1111
56
LSB
Address
Div
Address
Div
Address
Div
D
iv
ide
r(1:
0
)
Divider (3:2)
D
iv
ide
r(1:
0
)
Divider (3:2)
D
iv
id
e
r(1
:0
)
CPU Clock
Common Recommendations for Differential Routing
Dimension or Value
Unit
Figure
0.5 max
inch
1
L1 length, Route as coupled 93 ohm trace.
L2 length, Route as coupled 93 ohm trace.
Contact AMD
inch
1
L2
L1
3900pF
+/-10%
Figure 1 CPU clock routing.
Low Power Output Buffer
w/integrated series resistor
AMD "Greyhound"
CPU input
3900pF
+/-10%
93 +/-10% DIFF
169 +/-10%
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