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参数资料
| 型号： | 9UMS9001YKLF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC14 |
| 封装： | ROHS COMPLIANT, PLASTIC, MLF-56 |
| 文件页数： | 9/15页 |
| 文件大小： | 113K |
| 代理商： | 9UMS9001YKLF-T |
IDTTM/ICSTM PC MAIN CLOCK - CK540
1247A—08/28/08
Advance Information
ICS9UMS9001
PC MAIN CLOCK - CK540
3
Pin Description (continued)
PIN #
PIN NAME
TYPE
DESCRIPTION
29
CKLREQ0#
IN
Clock request input for SRC output pair 0. See the SRC, LCD, DOT Power Management Table for
details
30
SRC0C_LPRS
OUT
Complement side of low-power CK505-type SRC0 differential clock. Rs is integrated (No external
series resistor required).
31
SRC0T_LPRS
OUT
True side of low-power CK505-type SRC0 differential clock. Rs is integrated (No external series
resistor required).
32
SRC1C_LPRS
OUT
Complement side of low-power CK505-type SRC1 differential clock. Rs is integrated (No external
series resistor required).
33
SRC1T_LPRS
OUT
True side of low-power CK505-type SRC1 differential clock. Rs is integrated (No external series
resistor required).
34
GNDSRC
PWR Ground for SRC clocks
35
VDDIO_SRC
PWR Power supply for SRC outputs. VDD_IO = 1.05 to 3.3V +/-5%.
36
SRC2C_LPRS
OUT
Complement side of low-power CK505-type SRC2 differential clock. Rs is integrated (No external
series resistor required).
37
SRC2T_LPRS
OUT
True side of low-power CK505-type SRC2 differential clock. Rs is integrated (No external series
resistor required).
38
SRC3C_LPRS
OUT
Complement side of low-power CK505-type SRC3 differential clock. Rs is integrated (No external
series resistor required).
39
SRC3T_LPRS
OUT
True side of low-power CK505-type SRC3 differential clock. Rs is integrated (No external series
resistor required).
40
VDDCORE_3.3
PWR 3.3V Power supply for 3.3V core
41
CLKREQ3#
IN
Clock request input for SRC output pair 2. See the SRC, LCD, DOT Power Management Table for
details
42
CLKREQ2#
IN
Clock request input for SRC output pair 2. See the SRC, LCD, DOT Power Management Table for
details
43
FSLB
IN
Low threshold Frequency Select input. See Table 1: CPU Frequency Select Table and the Vih_fs and
Vil_fs specifications.
44
CPU_STOP#
IN
Stops all CPU clocks except those set to be free running.
45
CPUITPC_LPRS
OUT
Complement side of low-power CK505-type CPUITP differential clock. Rs is integrated (No external
series resistor required). Note that this pin is NOT muxed with an SRC output.
46
CPUITPT_LPRS
OUT
True side of low-power CK505-type CPUITP differential clock. Rs is integrated (No external series
resistor required).
47
CPU1C_LPRS
OUT
Complement side of low-power CK505-type CPU1 differential clock. Rs is integrated (No external
series resistor required). Note that this pin is NOT muxed with an SRC output.
48
CPU1T_LPRS
OUT
True side of low-power CK505-type CPU1 differential clock. Rs is integrated (No external series
resistor required).
49
VDDIO_CPU
PWR Power supply for CPU outputs. VDD_IO = 1.05 to 3.3V +/-5%.
50
GNDCPU
PWR Ground Pin for CPU Outputs
51
CPU0C_LPRS
OUT
Complement side of low-power CK505-type CPU1 differential clock. Rs is integrated (No external
series resistor required). Note that this pin is NOT muxed with an SRC output.
52
CPU0T_LPRS
OUT
True side of low-power CK505-type CPU1 differential clock. Rs is integrated (No external series
resistor required).
53
VDDCPUPLL_3.3
PWR 3.3V Power Supply for CPU PLL.
54
CK_PWRGD#/PD
IN
Notifies 9UMS9001 to sample latched inputs or enter power down mode.
1 = Power down mode
Falling Edge = Sample latched inputs
0 = Normal operation
55
FSLC
IN
Low threshold Frequency Select input. See Table 1: CPU Frequency Select Table and the Vih_fs and
Vil_fs specifications.
56
GNDREF
PWR Ground pin for crystal oscillator circuit and REF output
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