参数资料
型号: A1183LUA-T
厂商: Allegro Microsystems Inc
文件页数: 13/16页
文件大小: 543K
描述: IC SWITCH HALL EFFECT UNI 3-SIP
产品培训模块: Current Sensor
标准包装: 500
传感范围: 60G ~ 200G 跳闸 - 可编程,固定释放
类型: 单极开关
电源电压: 3.5 V ~ 24 V
电流 - 电源: 6.9mA
输出类型: 数字,开路集电极
特点: 可编程
工作温度: -40°C ~ 150°C
封装/外壳: 3-SIP
供应商设备封装: 3-SIP
包装: 散装
Sensitive Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switches
A1180, A1181,
A1182, and A1183
12
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
The pulse sequences consist of the following groups of pulses:
1. An enable sequence.
2. A bit eld address sequence.
3. When permanently setting the bit eld, a long V
PH
 fuse-blow-
ing pulse. (Note: Blown bit fuses cannot be reset.)
4. When permanently setting the bit eld, the level of V
CC
 must
be allowed to drop to zero between each pulse sequence, in
order to clear all registers. However, when provisionally set-
ting bit elds, V
CC
 must be maintained at V
PL
 between pulse
sequences, in order to maintain the prior bit eld settings while
preparing to set additional bit elds.
Bit elds that are not set are evaluated as zeros. The bit eld-level
fuses for 0 value bit elds are never blown. This prevents inad-
vertently setting the bit eld to 1. Instead, blowing the device-
level fuse protects the 0 bit elds from being accidentally set in
the future.
When provisionally trying the calibration value, one pulse
sequence is used, using decimal values. The sequence for setting
the value 5
10
 is shown in  gure 5.
When permanently setting values, the bit elds must be set indi-
vidually, and 5
10
 must be programmed as binary 101. Bit 3 is
set to 1 (000100
2
, which is 4
10
), then bit 1 is set to 1 (000001
2
,
which is 1
10
). Bit 2 is ignored, and so remains 0.Two pulse
sequences for permanently setting the calibration value 5 are
shown in  gure 6. The  nal V
PH
 pulse is maintained for a longer
period, enough to blow the corresponding bit eld-level fuse.
V
PH
V+
t
V
PM
V
PL
0
Encode 00100
2
 (4
10
)
Enable
Address
Address
Blow
Blow
Enable
Encode 00001
2
 (1
10
)
Figure 6. Pulse sequence to permanently encode calibration value 5 (101 binary, or
bit eld address 3 and bit eld address 1).
V
PH
V+
t
V
PM
V
PL
0
Try 5
10
Enable
Address
Clear
Optional
Monitoring
Figure 5. Pulse sequence to provisionally try calibration value 5.
相关PDF资料
PDF描述
6283-C-36 PLUG DBL BANA W/SAFE SHROUD 36"
6483-48-2 ALLIG 5 WAY-R/A BANANA PLUG RED
A1183LUA IC SWITCH HALL EFFECT UNI 3-SIP
6483-48-0 ALLIG 5 WAY-R/A BANANA PLUG BLK
6485-48-0 BED OF NAILS TO R/A BANANA BLACK
相关代理商/技术参数
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