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参数资料
| 型号： | A1448EEWLT-P |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 3/9页 |
| 文件大小： | 0K |
| 描述： | IC MOTOR DVR BLDC FULLBRDG MLP |
| 产品变化通告： | Pre-EOL Notice 07/Feb/2012 |
| 标准包装： | 1 |
| 应用： | DC 电机驱动器，无刷（BLDC） |
| 输出数： | 1 |
| 电流 - 输出： | ±200mA |
| 电源电压： | 1.8 V ~ 4.2 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-XFDFN 裸露焊盘 |
| 供应商设备封装： | 6-MLP/DFN 裸露焊盘（1.5x2） |
| 包装： | 标准包装 |
| 产品目录页面： | 1140 (CN2011-ZH PDF) |
| 其它名称： | 620-1274-6 |
Low-Voltage, Full-Bridge Brushless DC Motor Driver with
A1448
Integrated Hall Sensor IC, PWM Speed Control, Soft-Switching,
and Reverse Battery and Short Circuit Protection
Description (continued)
portable electronic devices. This feature allows the removal of a
FET transistor for switching the device on and off.
The A1448 is optimized for vibration motor applications in cel-
lular phones, pagers, electronic toothbrushes, hand-held video
game controllers, and can also be used as a micro-fan driver for
fans motors up to 1 W.
The Allegro DFN (EW) package is the thinnest DFN in the
Selection Guide
industry with a 0.40 mm maximum thickness that allows for very
thin BLDC coin motor designs. The small package outline and
low profile make this device ideally suited for use in applications
where printed circuit board area and component headroom are at
a premium. It is available in a lead (Pb) free, 6-contact MLP/DFN
micro-leadframe package, with an exposed pad for enhanced
thermal dissipation. Leadframe is 100% matte tin plated.
Part Number
A1448EEWLT-P 2
Packing 1
3000 pieces per 7-in. reel
Package
1.5 mm × 2 mm , 0.40 mm maximum overall package
height, 6-contact MLP/DFN with exposed thermal pad
1 Contact Allegro for additional packing options.
2 Allegro products sold in DFN package types are
Absolute Maximum Ratings
not intended for automotive applications.
Characteristic
Forward Supply Voltage
Reverse Supply Voltage
Forward Output Voltage
Reverse Output Voltage
Forward CONTROL Pin Input Voltage
Reverse CONTROL Pin Input Voltage
Continuous Output Current
Peak Output Current
Operating Ambient Temperature
Maximum Junction Temperature
Storage Temperature
Symbol
V DD
V RDD
V OUT
V ROUT
V IN
V RIN
I OUT
I OUT(pk)
T A
T J (max)
T stg
Notes
V DD > 0 V
V DD > 0 V
Positive I LOAD flow is from VOUT1 to VOUT2,
T J < T J (max)
<1 ms
Range E
Rating
5.5
–5.0
0 to V DD + 0.3
–0.3
0 to V DD + 0.3
V DD – 6.0 V
±200
±400
–40 to 85
165
–65 to 170
Units
V
V
V
V
V
V
mA
mA
oC
oC
oC
Thermal Characteristics may require derating at maximum conditions, see Power Derating section
Characteristic
Package Thermal Resistance
Symbol
R θ JA
Test Conditions*
On 2-layer PCB, with 0.23 in. 2 copper area each side
On 4-layer PCB based on JEDEC standard
Value
125
64
Units
oC/W
oC/W
*Additional thermal information available on the Allegro website
Terminal List
Number
Name
Function
Pin-out Diagram
1
2
VDD
CONTROL
Supply voltage
Input for PWM, braking, and sleep mode
VDD 1
CONTROL 2
NC 3
PAD
6 VOUT2
5 VOUT1
4 GND
3
4
NC
GND
No connection
Ground
5
6
VOUT1
VOUT2
First output
Second output
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
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