参数资料
| 型号： | A14V60A-PQ208C |
| 厂商： | Microsemi SoC |
| 文件页数： | 86/90页 |
| 文件大小： | 0K |
| 描述： | IC FPGA 6K GATES 3.3V 208-PQFP |
| 标准包装： | 24 |
| 系列： | ACT™ 3 |
| LAB/CLB数： | 848 |
| 输入/输出数： | 167 |
| 门数： | 6000 |
| 电源电压： | 3 V ~ 3.6 V |
| 安装类型： | 表面贴装 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 208-BFQFP |
| 供应商设备封装： | 208-PQFP（28x28） |
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R e visio n 3
4 -1
4 – Datasheet Information
List of Changes
The following table lists critical changes that were made in each version of the datasheet.
Revision
Changes
Page
Revision 3
(January 2012)
The description for SDO pins had earlier been removed from the datasheet and has
now been included again, in the "Pin Descriptions" section (SAR 35820).
SDO pin numbers had earlier been removed from package pin assignment tables in
the datasheet, and have now been restored to the pin tables (SAR 35820).
Revision 2
(September 2011)
The ACT 3 datasheet was formatted newly in the style used for current datasheets.
The same information is present (other than noted in the list of changes for this
revision) but divided into chapters.
N/A
The datasheet was revised to note in multiple places that speed grades –2 and –3
have been discontinued. The following device/package combinations have been
discontinued for all speed grades and temperatures (SAR 33872):
A1415 PG100
A1425 PG133
A1440 PG175
A1460 BG225
I and
others
The "Features" section was revised to state the clock-to-ouput time and on-chip
performance for –1 speed grade as 9.0 ns and 186 MHz. The "General Description"
section was revised in accordance (SAR 33872).
The maximum performance values were updated in Table 1 ACT 3 Family Product
Information, and now reflect worst-case commercial for the –1 speed grade (SAR
33872).
The "Product Plan" table was updated as follows to conform to current offerings (SAR
33872):
The A1415A device is offered in PL84, PG100, and VQ100 packages for Military
application.
The A1440A device is offered in TQ176 and VQ100 packages for Industrial
application.
Table 1-1 Chip-to-Chip Performance (worst-case commercial) was updated to
include data for all speed grades instead of only –3 (SAR 33872).
revised to reflect values for the –1 speed grade (SAR 33872).
Figure 2-10 Timing Model was updated to show data for the –1 speed grade instead
of –3 (SAR 33872).
Conditions was updated to include data for all speed grades instead of only –3 (SAR
33872).
Package names used in the "Package Pin Assignments" section and throughout the
document were revised to match standards given in Package Mechanical Drawings
(SAR 27395).
相关PDF资料 |
PDF描述 |
|---|---|
| A14V60A-PQG208C | IC FPGA 6K GATES 3.3V 208-PQFP |
| A3PE3000L-1FG324I | IC FPGA 1KB FLASH 3M 324-FBGA |
| 180-078-273L030 | CONN DB78 FEMALE HD CRIMP NICKEL |
| ASC40DRYH-S734 | CONN EDGECARD 80POS DIP .100 SLD |
| A3PE3000L-1FGG896I | IC FPGA 1KB FLASH 3M 896-FBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| A14V60A-PQG160C | 功能描述:IC FPGA 6K GATES 3.3V 160-PQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ACT™ 3 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75） |
| A14V60A-PQG208C | 功能描述:IC FPGA 6K GATES 3.3V 208-PQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ACT™ 3 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75） |
| A14V60A-TQ176C | 功能描述:IC FPGA 6K GATES 3.3V 176-TQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ACT™ 3 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75） |
| A14V60A-TQG176C | 功能描述:IC FPGA 6K GATES 3.3V 176-TQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ACT™ 3 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75） |
| A15 | 制造商:Industrial Timer Company (ITC) 功能描述:Timer-Counter Display Panel |
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