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参数资料
| 型号： | A2550KLPTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 15/15页 |
| 文件大小： | 0K |
| 描述： | IC RELAY DRVR AUTO W/REG 16TSSOP |
| 标准包装： | 1 |
| 应用： | 汽车用，继电器驱动器 |
| 输出数： | 3 |
| 电源电压： | 7 V ~ 40 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 供应商设备封装： | 16-TSSOP-EP |
| 包装： | 标准包装 |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1182-6 |
A2550
Relay Driver with 5 V Regulator
for Automotive Applications
16-Pin TSSOP (Suffix LP) with Exposed Pad
16
5.00 ±0.10
4° ±4
16
0.45
0.65
0.15 –0.06
B
+0.05
1.70
3.00
4.40 ±0.10
6.40 ±0.20
0.60 ±0.15
3.00
1
A
2
(1.00)
3.00
0.25
1 2
16X
0.10 C
SEATING
PLANE
C
SEATING PLANE
GAUGE PLANE
C
3.00
PCB Layout Reference View
0.25 –0.06
+0.05
0.65
1.20 MAX
0.15 MAX
For Reference Only
(reference JEDEC MO-153 ABT)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (bottom surface)
C Reference land pattern layout (reference IPC7351 SOP65P640X110-17M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
Copyright ?2006-2013, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
15
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