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参数资料
| 型号： | A3906SESTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 10/10页 |
| 文件大小： | 0K |
| 描述： | IC DVR DC/STEP MOTOR DUAL 20-QFN |
| 标准包装： | 1 |
| 应用： | 直流电机驱动器，步进电机驱动器 |
| 输出数： | 2/1 |
| 电流 - 输出： | ± 1A |
| 电源电压： | 2.5 V ~ 9 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 供应商设备封装： | 20-QFN 裸露焊盘（4x4） |
| 包装： | 标准包装 |
| 产品目录页面： | 1140 (CN2011-ZH PDF) |
| 其它名称： | 620-1288-6 |
A3906
Low Voltage Stepper and Single/Dual DC Motor Driver
ES Package, 20-Contact QFN with Exposed Thermal Pad
0.30
1
2
20
A
4.00 ±0.15
4.00 ±0.15
0.95
1
2
20
0.50
2.45
4.10
2.45
4.10
21X
D
0.08 C
SEATING
PLANE
C
C
PCB Layout Reference View
0.25 –0.07
+0.05
0.50
0.75 ±0.05
For Reference Only
(reference JEDEC MO-220WGGD)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
0.40 –0.10
+0.15
2
1
B
2.45
C Reference land pattern layout (reference IPC7351
QFN50P400X400X80-21BM)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
20
D Coplanarity includes exposed thermal pad and terminals
2.45
Copyright ?2008-2013, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
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