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参数资料
型号： A3PN030-ZFVQ100
元件分类： FPGA
英文描述： FPGA, 768 CLBS, 30000 GATES, PQFP100
封装： 14 X 14 MM, 1.20 MM HEIGHT, 0.50 MM PITCH, VQFP-100
文件页数： 4/92页
文件大小： 3184K
代理商： A3PN030-ZFVQ100
ProASIC3 nano Device Overview
1- 8
A d vance v0.4
Part Number and Revision Date
Part Number 51700111-001-3
Revised February 2009
List of Changes
The following table lists critical changes that were made in the current version of the document.
Previous Version
Changes in Current Version (Advance v0.4)
Page
Advance v0.3
(November 2008)
Table 1 ProASIC3 nano Devices was revised to change the maximum user I/Os for
A3PN020 and A3PN030. The following table note was removed: "Six chip (main)
and three quadrant global networks are available for A3PN060 and above."
I
The QN100 package was removed for all devices.
N/A
The "Device Marking" section is new.
III
Advance v0.2
(October 2008)
The A3PN030 device was added to product tables and replaces A3P030 entries
that were formerly in the tables.
I to IV
The "Wide Range I/O Support" section is new.
1-7
Advance v0.1
(October 2008)
The "I/Os Per Package" table was updated to add the following information to
table note 4: "For nano devices, the VQ100 package is offered in both leaded and
RoHS-compliant versions. All other packages are RoHS-compliant only."
II
The "ProASIC3 nano Product Available in the Z Feature Grade" section was
updated to remove QN100 for A3PN250.
IV
The "General Description" section was updated to give correct information
about number of gates and dual-port RAM for ProASIC3 nano devices.
1-1
The device architecture figures, Figure 1-3 ProASIC3 nano Device Architecture
Overview
with
Two
I/O
Banks
(A3PN060
and
A3PN125)
through
Figure 1-4 ProASIC3 nano Device Architecture Overview with Four I/O Banks
(A3PN250), were revised. Figure 1-1 ProASIC3 Device Architecture Overview
with Two I/O Banks and No RAM (A3PN010 and A3PN030) is new.
1-3
through
1-5
The "PLL and CCC" section was revised to include information about CCC-GLs in
A3PN020 and smaller devices.
1-6
相关PDF资料
PDF描述
A3PN030-ZFVQG100 FPGA, 768 CLBS, 30000 GATES, PQFP100
A3PN030-ZQN48I FPGA, 768 CLBS, 30000 GATES, QCC48
A3PN030-ZQN48 FPGA, 768 CLBS, 30000 GATES, QCC48
A3PN030-ZQN68I FPGA, 768 CLBS, 30000 GATES, QCC68
A3PN030-ZQN68 FPGA, 768 CLBS, 30000 GATES, QCC68
相关代理商/技术参数
参数描述
A3PN030-ZQNG48 功能描述:IC FPGA NANO 30K GATES 48-QFN RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASIC3 nano 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14）
A3PN030-ZQNG48I 功能描述:IC FPGA NANO 30K GATES 48-QFN RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASIC3 nano 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14）
A3PN030-ZQNG68 功能描述:IC FPGA NANO 30K GATES 68-QFN RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASIC3 nano 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14）
A3PN030-ZQNG68I 功能描述:IC FPGA NANO 30K GATES 68-QFN RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASIC3 nano 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14）
A3PN030-ZVQ100 功能描述:IC FPGA NANO 30K GATES 100-VQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASIC3 nano 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14）
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