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| 型号： | A4401KLTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 13/17页 |
| 文件大小： | 0K |
| 描述： | IC QUASI FLYBACK CONVERTER 8SOIC |
| 标准包装： | 1 |
| 显示器类型： | 真空荧光 (VF) |
| 电流 - 电源： | 2.3mA |
| 电源电压： | 7 V ~ 40 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 标准包装 |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1217-6 |
A4401
Automotive Quasi-Resonant Flyback Control IC
filtering, it is imperative that the “power loop” formed
by the input filter, primary winding, MOSFET, Q1,
and sense resistor is as short and “tight” as possible.
This means components should be placed as close
together as possible, and the loop area should be
minimized, in order to reduce the effects of magnetic
pickup and noise generation at higher frequencies. A
ground plane is not necessary, however, a good star
ground connection should be formed between the
input filter capacitor and the sense resistor. Circuit
traces should be as wide as possible, in order to mini-
mize leakage inductance. Figure 3 illustrates the main
power loop.
A local ground plane around the A4401 can be used to
minimize ground bounce issues. This can be done with
a simple connection from the ground pin of the A4401
to the star ground, being careful to avoid any connec-
tion between this local ground plane and the power
loop.
The compensation components connected to the
COMP pin, the filter capacitor connected to VIN, the
feedback resistors connected to VA, and the resonant
capacitor connected to LX should be located as close
to their respective pins as possible. In addition, the
length of the traces between those components and
ground should be as short as possible.
Secondary Block Each output power circuit should
be laid out with identical principles relative to the pri-
mary side power circuit, that is, with each secondary
winding, rectifying diode, and output capacitor posi-
tioned close together and forming a tight loop.
The high voltage output circuits should be kept well
away from all the control circuitry. It is recommended
that good connections be made between each of the
local output grounds and the star ground. In addition,
all of the output grounds should be connected together
via wide traces and not ground planes. Figure 4 illus-
trates one of the output loops.
The feedback resistor connected to the regulated
output rail should be located as close to the VA pin as
possible. The PCB trace that connects the top of this
resistor to the output rail should not be located near
any of the output power loops or ground connections.
Electromagnetic Interference
Some of the previous sections provide information
on reducing EMI in terms of input filter capacitance
selection, magnetics design (to achieve zero voltage
switching at nominal input voltage), and board lay-
out. This section provides some additional advice on
L SEC
C OUT
Minimize this loop area
reducing EMI.
Effects of Magnetics Design on 0 V Switching Fig-
ure 5 illustrates a converter running at full power with
V BAT = 13.5 V. The upper trace is the voltage across
LX and the lower trace is the voltage across the sense
resistor (essentially the current through the primary
winding and the MOSFET, Q1). The magnetic set in
this case was designed to achieve 0 V switching at
Figure 4. One of three output power loops
a V BAT of 7 V.
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
13
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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| A4402ELPTR-T | 功能描述:IC REG DL BUCK/LINEAR 16-TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 + 切换式 系列:- 标准包装:2,500 系列:- 拓扑:降压（降压）同步（3），线性（LDO）（2） 功能:任何功能 输出数:5 频率 - 开关:300kHz 电压/电流 - 输出 1:控制器 电压/电流 - 输出 2:控制器 电压/电流 - 输出 3:控制器 带 LED 驱动器:无 带监控器:无 带序列发生器:是 电源电压:5.6 V ~ 24 V 工作温度:-40°C ~ 85°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
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