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| 型号： | A4936METTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 7/9页 |
| 文件大小： | 0K |
| 描述： | IC DC MOTOR PREDRIVER 3PH 32QFN |
| 标准包装： | 1 |
| 应用： | DC 电机驱动器，无刷（BLDC），3 相 |
| 输出数： | 1 |
| 工作温度： | -20°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
| 包装： | 标准包装 |
| 其它名称： | 620-1347-6 |
A4936
3-Phase Brushless DC Motor Pre-Driver
Functional Description
Current Regulation Load current is regulated by an internal
fixed off-time PWM control circuit. When the outputs of the full
bridge are turned on, current increases in the motor winding until
it reaches a value, I TRIP , given by:
I TRIP = 200 mV / R SENSE
When I TRIP is reached, the sense comparator resets the source
enable latch, turning off the source driver. At this point, load
inductance causes the current to recirculate for the fixed off-time
period.
PWM Logic The PWM input terminal allows external PWM.
PWM high turns on the selected sink-source pair. PWM low
switches off the appropriate drivers and the load current decays.
If PWM is held high, the current will rise until it reaches the
level set by the internal current control circuit. Typically PWM
frequency is in the 20 to 30 kHz range. The PWM logic is sum-
marized in the following table:
Run Mode The motor phases are only energized when the STOP
input is low. When the STOP input is high, all MOSFETs are held
in the off state and the phase connections to the motor are high
impedance. In this state a running motor will coast to stop. The
STOP input overrides the PWM input. When STOP is high and
BRAKE is high, the A4936 enters Standby mode.
Brake Mode A logic high on the BRAKE pin activates Brake
mode. A logic low allows normal operation. Braking turns on all
three sink drivers, effectively shorting out the motor-generated
BEMF. The BRAKE input overrides the PWM input and also the
Lock Detect function. The STOP input must be low for Brake
mode to operate.
It is important to note that the internal PWM current control cir-
cuit does not limit the current when braking, because the current
does not flow through the sense resistor. The maximum current
can be approximated by V BEMF / R LOAD . Care should be taken to
PWM
1
0
Outputs
On
Source
chopped
Outputs State
Drive
Slow decay with
synchronous rectification
insure that the maximum ratings of the A4396 are not exceeded
in the worse case braking situation of high speed and high inertial
load.
Standby Mode The reduced power Standby mode is provided
Fixed Off-Time The A4936 fixed off-time is set to 25 μ s,
nominal.
PWM Blank Timer When a source driver turns on, a current
spike occurs due to the reverse recovery currents of the clamp
diodes as well as switching transients related to distributed capac-
itance in the load. To prevent this current spike from erroneously
resetting the source enable latch, the sense comparator is blanked.
The blanking timer runs after the off-time counter completes,
in order to provide the blanking function. The blanking timer is
reset when PWM is low or DIR is changed. With external PWM
control, a DIR change or a PWM-on triggers the blanking func-
tion. The duration is fixed at 1.5 μ s.
Synchronous Rectification When a PWM-off cycle is trig-
gered, either by a low input on PWM or by an internal fixed
off-time cycle, load current recirculates. The A4936 synchronous
rectification feature turns-on the appropriate MOSFETs during
the current decay, and effectively shorts-out the body diodes with
the low R DS(on) driver. This lowers power dissipation signifi-
cantly and can eliminate the need for external Schottky diodes.
to reduce current consumption when the motor is not required to
be driven. The Hall bias supply and the charge pump are disabled
and all MOSFETs are turned-off. The A4936 enters Standby
mode when STOP and BRAKE are held high together. All other
control inputs are ignored when in Standby mode.
HBIAS Function This provides a power supply of 7.5 V,
current-limited to 30 mA. This reference voltage is used to power
the logic sections of the A4936 and also to power the external
Hall elements.
Charge Pump The internal charge pump is used to generate a
supply above VBB to drive the high-side MOSFETs. The voltage
on the VCP pin is internally monitored, and in case of a fault
condition, the outputs of the device are disabled.
Fault Shutdown In the event of a fault due to excessive junc-
tion temperature or due to low voltage on VCP or VBB, the
outputs of the device are disabled until the fault condition is
removed. At power-up the UVLO circuit disables the drivers.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
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