参数资料
型号: A4938EETTR-T
厂商: Allegro Microsystems Inc
文件页数: 8/10页
文件大小: 0K
描述: IC DC MOTOR PREDRIVER 3PH 28-QFN
标准包装: 1
应用: DC 电机控制器,无刷(BLDC),3 相
输出数: 1
电源电压: 8.5 V ~ 30 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-VFQFN 裸露焊盘
供应商设备封装: 28-QFN
包装: 标准包装
其它名称: 620-1383-6
A4938
3-Phase Brushless DC Motor Pre-Driver
Functional Description
Current Regulation Load current is regulated by an internal
fixed off-time PWM control circuit. When the outputs of the full
bridge are turned on, current increases in the motor winding until
it reaches a value, I TRIP , given by:
I TRIP = 200 mV / R SENSE .
When I TRIP is reached, the sense comparator resets the source
enable latch, turning off the source driver. At this point, load
inductance causes the current to recirculate for the fixed off-time
period.
Enable Logic The ENABLE pin allows external PWM.
ENABLE low turns on the selected sink-source pair. ENABLE
high switches off the appropriate drivers and the load cur-
rent decays. If ENABLE is held low, the current will rise until
it reaches the level set by the internal current control circuit.
Typically PWM frequency is in the 20 to 30 kHz range. If the
ENABLE high pulse width exceeds 3 ms, the gate outputs are
disabled. The Enable logic is summarized in the following table:
ENABLE Pin Outputs Outputs State
0 On Drive
Slow decay with
1 Source chopped synchronous
rectification
provide the blanking function. The blanking timer is reset when
ENABLE is chopped or DIR is changed. For external PWM
control, a DIR change or an ENABLE on triggers the blanking
function. The duration is fixed at 1.5 μ s.
Synchronous Rectification When a PWM-off cycle is
triggered, either by an ENABLE chop command or by an internal
fixed off-time cycle, load current recirculates. The A4938 syn-
chronous rectification feature turns on the appropriate MOSFETs
during the current decay, and effectively shorts out the body
diodes with the low R DS(on) driver. This lowers power dissipation
significantly and can eliminate the need for external Schottky
diodes.
Brake Mode A logic low on the BRAKEZ pin activates Brake
mode. A logic high allows normal operation. Braking turns on all
three sink drivers, effectively shorting out the motor-generated
BEMF. The BRAKEZ input overrides the ENABLE input and
also the Lock Detect function.
It is important to note that the internal PWM current control cir-
cuit does not limit the current when braking, because the current
does not flow through the sense resistor. The maximum current
can be approximated by V BEMF / R LOAD . Care should be taken to
insure that the maximum ratings of the A4938 are not exceeded
1 for > 3 ms typical
Off
Disable
in the worse case braking situation: high speed and high inertial
Fixed Off-Time The A4938 fixed off-time is set to 25 μ s
nominal.
PWM Blank Timer When a source driver turns on, a current
spike occurs due to the reverse recovery currents of the clamp
diodes and/or switching transients related to distributed capaci-
tance in the load. To prevent this current spike from errone-
ously resetting the source Enable latch, the sense comparator is
blanked. The blanking timer runs after the off-time counter, to
load.
HBIAS Function This function provides a power supply of
5.0 V, current-limited to 35 mA. This reference voltage is used
to power the logic sections of the A4938 and also to power the
external Hall elements.
Standby Mode To prevent excessive power dissipation due
to the current draw of the external Hall elements, Standby mode
turns off the HBIAS output voltage. Standby mode is triggered by
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
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