参数资料
| 型号： | A54SX08A-2FG144I |
| 厂商： | Microsemi SoC |
| 文件页数： | 65/108页 |
| 文件大小： | 0K |
| 描述： | IC FPGA SX 12K GATES 144-FBGA |
| 标准包装： | 160 |
| 系列： | SX-A |
| LAB/CLB数： | 768 |
| 输入/输出数： | 111 |
| 门数： | 12000 |
| 电源电压： | 2.25 V ~ 5.25 V |
| 安装类型： | 表面贴装 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 144-LBGA |
| 供应商设备封装： | 144-FPBGA（13x13） |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页当前第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页
SX-A Family FPGAs
1- 2
v5.3
Logic Module Design
The SX-A family architecture is described as a “sea-of-
modules” architecture because the entire floor of the
device is covered with a grid of logic modules with
virtually no chip area lost to interconnect elements or
routing. The Actel SX-A family provides two types of
logic
modules:
the
register
cell
(R-cell)
and
the
combinatorial cell (C-cell).
The R-cell contains a flip-flop featuring asynchronous clear,
asynchronous preset, and clock enable, using the S0 and S1
lines control signals (Figure 1-2). The R-cell registers feature
programmable clock polarity selectable on a register-by-
register basis. This provides additional flexibility while
allowing mapping of synthesized functions into the SX-A
FPGA. The clock source for the R-cell can be chosen from
either the hardwired clock, the routed clocks, or internal
logic.
The C-cell implements a range of combinatorial functions
of up to five inputs (Figure 1-3). Inclusion of the DB input
and its associated inverter function allows up to 4,000
different combinatorial functions to be implemented in a
single module. An example of the flexibility enabled by
the inversion capability is the ability to integrate a 3-input
exclusive-OR function into a single C-cell. This facilitates
construction of 9-bit parity-tree functions with 1.9 ns
propagation delays.
Module Organization
All C-cell and R-cell logic modules are arranged into
horizontal banks called Clusters. There are two types of
Clusters: Type 1 contains two C-cells and one R-cell, while
Type 2 contains one C-cell and two R-cells.
Clusters
are
grouped
together
into
SuperClusters
(Figure 1-4 on page 1-3). SuperCluster 1 is a two-wide
grouping of Type 1 Clusters. SuperCluster 2 is a two-wide
group containing one Type 1 Cluster and one Type 2
Cluster. SX-A devices feature more SuperCluster 1
modules than SuperCluster 2 modules because designers
typically require significantly more combinatorial logic
than flip-flops.
Figure 1-2 R-Cell
Figure 1-3 C-Cell
DQ
DirectConnect
Input
CLKA,
CLKB,
Internal Logic
HCLK
CKS
CKP
CLR
PRE
Y
Routed
Data Input
S0
S1
D0
D1
D2
D3
DB
A0 B0
A1 B1
Sa
Sb
Y
相关PDF资料 |
PDF描述 |
|---|---|
| AGM30DTMT | CONN EDGECARD 60POS R/A .156 SLD |
| A54SX16A-2FGG144 | IC FPGA SX 24K GATES 144-FBGA |
| A42MX16-PL84 | IC FPGA MX SGL CHIP 24K 84-PLCC |
| FSM22DSEI-S13 | CONN EDGECARD 44POS .156 EXTEND |
| A54SX08-VQ100 | IC FPGA SX 12K GATES 100-VQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| A54SX08A-2FG208 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SX-A Family FPGAs |
| A54SX08A-2FG208A | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SX-A Family FPGAs |
| A54SX08A-2FG208B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SX-A Family FPGAs |
| A54SX08A-2FG208I | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SX-A Family FPGAs |
| A54SX08A-2FG208M | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SX-A Family FPGAs |
发布紧急采购，3分钟左右您将得到回复。