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| 型号： | A6281EESTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 9/11页 |
| 文件大小： | 0K |
| 描述： | IC LED DRIVER PWM CONTROL 16-QFN |
| 产品培训模块： | A6281 Three-channel LED Driver |
| 标准包装： | 1,500 |
| 恒定电流： | 是 |
| 拓扑： | 线性，PWM |
| 输出数： | 3 |
| 内部驱动器： | 是 |
| 类型 - 次要： | RGB |
| 频率： | 5MHz |
| 电源电压： | 4.75 V ~ 17 V |
| 输出电压： | 1 V ~ 3 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFQFN 裸露焊盘 |
| 供应商设备封装： | 16-QFN/MLP 裸露焊盘（3x3） |
| 包装： | 带卷 (TR) |
| 工作温度： | -40°C ~ 85°C |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1218-2 |
A6281
3-Channel Constant Current LED Driver
with Programmable PWM Control
Application Information
Timing Considerations
A6281s can be used in large numbers to drive many LEDs with
the control signals connected serially together using short cables
between each pixel (see figure 8). Because the clock negative
edge drives the data to the SDO pin, and the CO pin is driven
by a 100 ns one-shot function, the clock and data signals remain
synchronized with each other from the first pixel in the chain to
the last.
After all of the data is written to each A6281 in the chain, the
data is latched into each A6281 via a low-to-high transition on
the LI pin. The LO pin of pixel #1 drives the LI pin of pixel #2,
and so on down the chain. These signals are buffered and are
driven asynchronously relative to the CI and SDI pins. Therefore
the mismatch in delays between CO and LO must be taken into
consideration.
CI(1)
Although the mismatches in delays are quite small, they must be
considered when creating the timing pattern for driving the chain.
The key parameter is the setup time from the last CI clock rising
edge to the rising edge of LI.
The minimum A6281 setup time from CI to LI is 20 ns. There
may be a 5 ns per pixel mismatch in the propagation delays of the
CI and LI signals (the delay from CI to CO compared to the delay
from LI to LO). As a rule of thumb, use a setup time, t su , at the
first A6281 in the chain as calculated below:
t su = 20 ns + n × 5 ns ,
where n is the number of pixels in the chain.
This will ensure that the setup time at the last pixel in the chain is
at least 20 ns.
t su
CI(1) to CI( n )
LI(1) to LI( n )
CO(1) = CI(2)
CO(2) = CI(3)
CO( n -1) = CI( n )
LI (1)
LO (1) = LI (2)
LO (2) = LI (3)
LO ( n -1) = LI ( n )
Figure 7. Signal Delay Mismatch Timing Diagram. t su is the setup time for signals (CI to LI)
applied to the first pixel in the chain. Note the difference in delay for CI(1) to CI( n ) compared
to the delay for LI(1) to LI( n ). This must be compensated by increasing t su .
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
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相关代理商/技术参数 |
参数描述 |
|---|---|
| A6281KIT | 制造商:Allegro MicroSystems 功能描述:EVALIATION KIT |
| A6282 | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:16-Channel Constant-Current LED Driver |
| A6282AEESTR-T | 制造商:Allegro MicroSystems LLC 功能描述: |
| A6282AELPTR-T | 制造商:Allegro MicroSystems LLC 功能描述: |
| A6282EES-T | 制造商:Allegro MicroSystems 功能描述:LED DRIVER 16 CH CONST-CURRENT 制造商:Allegro MicroSystems 功能描述:LED DRIVER, 16 CH, CONST-CURRENT 制造商:Allegro MicroSystems 功能描述:LED DRIVER, 16 CH, CONST-CURRENT; Topology:Constant Current; No. of Outputs:16; Output Current:51.1mA; Output Voltage:12V; Driver Case Style:QFN; Input Voltage Min:3V; Input Voltage Max:5.5V; Switching Frequency:30MHz; Operating ;RoHS Compliant: Yes |
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