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| 型号： | AD13280AF |
| 厂商： | Analog Devices Inc |
| 文件页数： | 25/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 68CLCC |
| 标准包装： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 80M |
| 数据接口： | 并联 |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 4.3W |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | -25°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 68-CLCC |
| 供应商设备封装： | 68-CLCC（50.8x50.8） |
| 包装： | 管件 |
| 输入数目和类型： | 2 个差分，双极 |
| 配用： | AD13280/PCB-ND - KIT EVAL PCB FOR AD13280 |
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AD13280
Rev. C | Page 6 of 28
AD13280AZ
Parameter
Temperature
Test Level
Min
Typ
Max
Unit
I (DVCC) Current
Full
I
34
46
mA
ICC (Total) Supply Current per Channel
Full
I
375
459
mA
Power Dissipation (Total)
Full
I
3.7
4.3
W
Power Supply Rejection Ratio (PSRR)
Full
V
0.01
% FSR/% VS
1 All ac specifications tested by driving ENCODE and ENCODE differentially. Single-ended input: AMP-IN-x-1 = 1 V p-p, AMP-IN-x-2 = GND.
2 Gain tests are performed on the AMP-IN-x-1 input voltage range.
3 Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
4 For differential input: +IN = 1 V p-p and IN = 1 V p-p (signals are 180 Ω out of phase). For single-ended input: +IN = 2 V p-p and –IN = GND.
5 Minimum and maximum conversion rates allow for variation in encode duty cycle of 50% ± 5%.
6 Analog input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 80 MSPS. SNR is
reported in dBFS, related back to converter full scale.
7 Analog input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 80 MSPS. SINAD is
reported in dBFS, related back to converter full scale.
8 Analog input signal at –1 dBFS; SFDR is the ratio of converter full scale to worst spur.
9 Both input tones at –7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third-order intermodulation product.
10 Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B channel.
11 Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads >10 pF degrades performance.
12 Supply voltage recommended operating range. AVCC may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range
AVCC = 5.0 V to 5.25 V.
TIMING DIAGRAM
tA
AIN
N
N + 1
N + 2
N + 3
N + 4
N
N+1
N+2
N+3
N + 4
N – 3
N – 2
N – 1
tOD
D[11:0]
DRY
ENCODE,
ENCODE
N
tE_DR
tENC
tENCH
tENCL
0
23
86
-0
12
Figure 2.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD13280AZ | 功能描述:IC ADC 12BIT 68CLCC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:12 采样率（每秒）:3M 数据接口:- 转换器数目:- 功率耗散（最大）:- 电压电源:- 工作温度:- 安装类型:表面贴装 封装/外壳:SOT-23-6 供应商设备封装:SOT-23-6 包装:带卷 (TR) 输入数目和类型:- |
| AD13280BF | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual-Channel, 12-Bit, 80 MSPS ADC with Analog Input Signal Conditioning |
| AD13280BZ | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Channel, 12-Bit, 80 MSPS A/D Converter with Analog Input Signal Conditioning |
| AD132IV | 制造商:未知厂家 制造商全称:未知厂家 功能描述:TRANSISTOR | BJT | PNP | 60V V(BR)CEO | 3A I(C) | TO-3 |
| AD-132MC | 制造商:DATEL 功能描述: |
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