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参数资料
| 型号： | AD1859JRZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/16页 |
| 文件大小： | 0K |
| 描述： | IC DAC STEREO SGL SUPP 5V 28SOIC |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 产品变化通告： | AD1859 Discontinuation 12/Apr/2012 |
| 标准包装： | 1 |
| 位数： | 18 |
| 数据接口： | DSP，I²S，串行，SPI? |
| 转换器数目： | 2 |
| 电压电源： | 模拟和数字 |
| 功率耗散（最大）： | 330mW |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC W |
| 包装： | 标准包装 |
| 输出数目和类型： | 2 电压，单极 |
| 采样率（每秒）： | * |
| 其它名称： | AD1859JRZ-RLDKR |
REV. A
–12–
AD1859
Figure 15 shows the suggested interface to the Zoran ZR38000
DSP chip, which can act as an MPEG audio or AC-3 audio
decoder. The ZR38000 supports 16 bits of data using a left-
justified output format.
ZORAN
ZR38000
256 x FS
LO
AD1859
13
14
8
9
10
12
HI
LO
BCLK
LRCLK
SDATA
IDPM0
IDPM1
18/16
SCKB
WSB
SDB
SCKIN
Figure 15. Interface to ZR38000
Figure 16 shows the suggested interface to the C-Cube
Microsystems CL480 MPEG system decoder IC. The CL480
supports 16 bits of data using a right-justified output format.
C-CUBE
CL480
LO
AD1859
13
14
8
9
10
12
LO
BCLK
LRCLK
SDATA
IDPM0
IDPM1
18/16
DA-BCK
DA-LRCK
DA-DATA
DA-XCK
256 x FS
OR
384 x FS
Figure 16. Interface to CL480
Layout and Decoupling Considerations
The recommended decoupling, bypass circuits for the AD1859
are shown in Figure 17. Figure 17 illustrates a connection dia-
gram for systems which do not require de-emphasis support.
The recommended circuit connection for system including de-
emphasis is shown in Figure 18.
AD1859
10F
0.1F
BIAS VOLTAGE
FOR EXTERNAL USE
1k
2.2nF
LEFT LINE
OUTPUT
RIGHT LINE
OUTPUT
10F
20-64pF
27MHz
XTALI/MCLK
XTALO
CDATA CCLK CLATCH
+5V ANALOG
0.1F
1F
AGND
AVDD
SDATA
BLCK
LRCLK
IDPM0
IDPM1
18/16
10
8
9
12
13
14
DSP OR
AUDIO
DECODER
PD/RST
MUTE
DEEMP
+5V DIGITAL
DGND
DVDD
FILT
CMOUT
OUTL
EMPL
OUTR
EMPR
AD1859
10F
2
6
7
15
11
20
16
19
21
22
23
CONTROLLER
28
24
25
26
27
5
3
NC
FGND
1k
2.2nF
10F
CONTROLLER
NC
0.01F
1F
17
18
4
1
0.1F
30
(CHIP RESISTOR
PREFERRED)
Figure 17. Recommended Circuit Connection (Without De-emphasis)
BIAS VOLTAGE
FOR EXTERNAL USE
1k
LEFT LINE
OUTPUT
RIGHT LINE
OUTPUT
1F
10F
1k
1F
470
33nF
NPO
470
OPTIONAL DE-EMPHASIS
CIRCUIT SHOWN
10F
0.1F
20-64pF
27MHz
XTALI/MCLK
XTALO
CDATA CCLK CLATCH
+5V ANALOG
0.1F
1F
AGND
AVDD
SDATA
BLCK
LRCLK
IDPM0
IDPM1
18/16
10
8
9
12
13
14
DSP OR
AUDIO
DECODER
PD/RST
MUTE
DEEMP
+5V DIGITAL
DGND
DVDD
FILT
CMOUT
OUTL
EMPL
OUTR
EMPR
AD1859
2
6
7
15
11
20
16
19
21
22
23
24
27
5
NC
FGND
CONTROLLER
NC
0.01F
1F
17
18
4
1
26
3
25
28
0.1F
10M
10M
2.2nF
30
(CHIP RESISTOR
PREFERRED)
33nF
NPO
CONTROLLER
Figure 18. Recommended Circuit Connection (With De-emphasis)
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相关代理商/技术参数 |
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| AD1860N | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD1860N-J | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD1860N-K | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD1860R | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD1860R-J | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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