参数资料
| 型号： | AD5171BRJZ10-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/24页 |
| 文件大小： | 0K |
| 描述： | IC DGTL POT OTP 10K SOT23-8 |
| 标准包装： | 3,000 |
| 接片： | 64 |
| 电阻（欧姆）： | 10k |
| 电路数： | 1 |
| 温度系数： | 标准值 35 ppm/°C |
| 存储器类型： | 非易失 |
| 接口： | I²C（设备位址） |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-8 |
| 供应商设备封装： | SOT-23-8 |
| 包装： | 带卷 (TR) |
| 配用： | AD5171EVAL-ND - BOARD EVAL FOR AD5171 |
AD5171
Rev. D | Page 12 of 24
THEORY OF OPERATION
03
43
7-
0
25
SDA
SCL
A
W
B
COMPARATOR
MUX
DECODER
FUSES
EN
FUSE
REG.
DAC
REG.
I2C INTERFACE
ONE-TIME
PROGRAM/TEST
CONTROL BLOCK
Figure 25. Detailed Functional Block Diagram
The AD5171 allows unlimited 6-bit adjustments, except for the
one-time programmable, set-and-forget resistance setting. OTP
technology is a proven, cost-effective alternative over EEMEM
in one-time memory programming applications. The AD5171
employs fuse link technology to achieve the memory retention
of the resistance setting function. It has six data fuses that control
the address decoder for programming the RDAC, one user
mode test fuse for checking setup error, and one programming
lock fuse for disabling any further programming once the data
fuses are blown.
ONE-TIME PROGRAMMING (OTP)
Prior to OTP activation, the AD5171 presets to midscale during
initial power-on. After the wiper is set at the desired position,
the resistance can be permanently set by programming the T bit
one-time VDD_OTP. The fuse link technology of the AD517x
family of digital potentiometers requires VDD_OTP between 4.75 V
and 5.25 V to blow the fuses to achieve a given nonvolatile
setting. On the other hand, VDD can be 2.7 V to 5.5 V during
operation. As a result, a system supply that is lower than 4.75 V
requires external supply for OTP. In addition, the user is only
allowed one attempt in blowing the fuses. If the user fails to
blow the fuses at the first attempt, the fuse structures may change
so that they may never be blown regardless of the energy applied
at subsequent events. For details, see the Power Supply
Considerations section.
The device control circuit has two validation bits, E1 and E0,
that can be read back to check the programming status (see
Table 5). Users should always read back the validation bits to
ensure that the fuses are properly blown. After the fuses are
blown, all fuse latches are enabled upon subsequent power-on;
therefore, the output corresponds to the stored setting.
Table 5. Validation Status
E1
E0
Status
0
Ready for programming.
0
1
Test fuse not blown successfully. For factory setup
checking purpose only. Users should not see these
combinations.
1
0
Fatal error. Some fuses are not blown. Do not retry.
Discard the unit.
1
Successful. No further programming is possible.
This section discusses the fuse operation in detail. When the
OTP T bit is set, the internal clock is enabled. The program then
attempts to blow a test fuse. The operation stops if the test fuse
is not properly blown. The validation bits, E1 and E0, show 01.
This status is intended for factory setup checking purposes
only; users should not see this status. If the test fuse is properly
blown, the data fuses can be programmed. The six data fuses
are programmed in six clock cycles. The output of the fuses is
compared with the code stored in the RDAC register. If they do
not match, E1 and E0 of 10 are issued as fatal errors and the
operation stops. Users should never try blowing the fuses more
than once because the fuse structure may have changed prohibiting
further programming. As a result, the unit must be discarded.
This error status can also occur if the OTP supply voltage goes
above or drops below the VDD_OTP requirement, the OTP supply
current is limited, or both the voltage and current ramp times
are slow. If the output and stored code match, the programming
lock fuse is blown so that no further programming is possible.
In the meantime, E1 and E0 issue 11, indicating the lock fuse is
properly blown. All the fuse latches are enabled at power-on;
therefore, from this point on, the output corresponds to the
stored setting. Figure 25 shows a detailed functional block
diagram.
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