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参数资料
| 型号： | AD5233BRUZ50-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/32页 |
| 文件大小： | 0K |
| 描述： | IC DGTL POT QUAD 64POS 24-TSSOP |
| 标准包装： | 1,000 |
| 接片： | 64 |
| 电阻（欧姆）： | 50k |
| 电路数： | 4 |
| 温度系数： | 标准值 600 ppm/°C |
| 存储器类型： | 非易失 |
| 接口： | 4 线 SPI（芯片选择） |
| 电源电压： | 2.7 V ~ 5.5 V，±2.25 V ~ 2.75 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 带卷 (TR) |
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AD5233
Rev. B | Page 22 of 32
The EEMEM1 value for RDAC1 can be restored by power-on,
by strobing the PR pin, or by programming, as shown in
Table 14. Restoring the EEMEM1 Value to the
RDAC1 Register
SDI
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many program, read, and erase cycles. In real
terms, a single endurance cycle is composed of the following
four independent, sequential events:
Initial page erase sequence
SDO
Action
0x10XX
Read/verify sequence
0xXXXX
Restores the EEMEM1 value to the
RDAC1 register.
0x00XX
Byte program sequence
Second read/verify sequence
0x10XX
NOP. Recommended step to minimize
power consumption.
During reliability qualification, Flash/EE memory is cycled
from 0x00 to 0x3F until a first fail is recorded, signifying the
endurance limit of the on-chip Flash/EE memory.
Table 15. Using Left-Shift by One to Increment 6 dB Step
SDI
SDO
Action
0xC0XX
As indicated in the Specifications section, the AD5233
Flash/EE memory endurance qualification has been carried
out in accordance with JEDEC Specification A117 over the
industrial temperature range of 40°C to +85°C. The results
allow the specification of a minimum endurance figure over
supply and temperature of 100,000 cycles, with an endurance
figure of 700,000 cycles being typical of operation at 25°C.
0xXXXX
Moves the wiper to double the present
data contained in the RDAC1 register.
Table 16. Storing Additional User Data in EEMEM
SDI
SDO
Action
0x35AA
0xXXXX
Stores Data 0xAA in the extra EEMEM6
location, USER1. (Allowable to address
in 11 locations with a maximum of
eight bits of data.)
0x3655
Retention quantifies the ability of the Flash/EE memory to
retain its programmed data over time. Again, the AD5233 has
been qualified in accordance with the formal JEDEC Retention
Lifetime Specification (A117) at a specific junction temperature
(TJ = 55°C). As part of this qualification procedure, the
Flash/EE memory is cycled to its specified endurance limit,
described previously, before data retention is characterized.
This means that the Flash/EE memory is guaranteed to retain
its data for its full specified retention lifetime every time the
Flash/EE memory is reprogrammed. It should also be noted
that retention lifetime, based on an activation energy of 0.6 eV,
retained for 100 years at 55°C operation, but reduces to 15 years
at 85°C operation. Beyond these limits, the part must be
reprogrammed so that the data can be restored.
0x35AA
Stores Data 0x55 in the extra EEMEM7
location USER2. (Allowable to address
in 11 locations with a maximum of
eight bits of data.)
Table 17. Reading Back Data from Memory Locations
SDI
SDO
Action
0x95XX
0xXXXX
Prepares data read from USER1 EEMEM
location.
0x00XX
0x95AA
NOP Instruction 0 sends a 16-bit word
out of SDO, where the last eight bits
contain the contents of the USER1
location. The NOP command ensures
that the device returns to the idle
power dissipation state.
TJ JUNCTION TEMPERATURE (°C)
300
250
0
40
RE
T
E
NT
IO
N
(
Y
ea
rs
)
Table 18. Reading Back Wiper Settings
SDI
SDO
Action
0xB020
0xXXXX
Writes RDAC1 to midscale.
0xC0XX
0xB020
Doubles RDAC1 from midscale to full scale
(left-shift instruction).
0xA0XX
200
150
100
50
0xC0XX
Prepares reading the wiper setting from the
RDAC1 register.
0xXXXX
0xA03F
Reads back full-scale value from SDO.
FLASH/EEMEM RELIABILITY
The Flash/EE memory array on the AD5233 is fully qualified
for two key Flash/EE memory characteristics, Flash/EE memory
cycling endurance, and Flash/EE memory data retention.
50
60
70
80
90
100
110
ANALOG DEVICES
TYPICAL PERFORMANCE
AT TJ = 55°C
02
79
4-
0
46
Figure 45. Flash/EE Memory Data Retention
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