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参数资料
| 型号： | AD5254EVAL |
| 厂商： | Analog Devices, Inc. |
| 元件分类： | 通用总线功能 |
| 英文描述： | Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers |
| 中文描述： | 双路、256抽头、非易失、I2C接口、数字电位器 |
| 文件页数： | 21/28页 |
| 文件大小： | 834K |
| 代理商： | AD5254EVAL |
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AD5253/AD5254
DIGITAL INPUT/OUTPUT CONFIGURATION
SDA is a digital input/output with an open-drain MOSFET that
requires a pull-up resistor for proper communication. On the
other hand, SCL and WP are digital inputs with pull-up
resistors recommended to minimize the MOSFET cross-
conduction when the driving signals are lower than V
DD
. SCL
and WP have ESD protection diodes, as shown in Figure 35 and
Figure 36.
Rev. 0 | Page 21 of 28
WP can be permanently tied to V
DD
without a pull-up resistor if
the write-protect feature is not used. If WP is left floating, an
internal current source will pull it low to enable write-protect.
In applications where the device is not being programmed on a
frequent basis, this allows the part to default to write-protect
after any one-time factory programming or field calibration
without using an on-board pull-down resistor. Since there are
protection diodes on all these inputs, their signal levels must not
be greater than V
DD
to prevent forward biasing of the diodes.
0
GND
SCL
V
DD
Figure 35. SCL Digital Input
0
GND
INPUTS
WP
V
DD
Figure 36. Equivalent WP Digital Input
MULTIPLE DEVICES ON ONE BUS
AD5253/AD5254 are equipped with two addressing pins, AD1
and AD0, that allow up to four AD5253/AD5254s to be
operated on one I
2
C bus. To achieve this result, the states of
AD1 and AD0 on each device must first be defined. An example
is shown in Table 12 and Figure 37. In I
2
C programming, each
device is issued a different slave address—01011(AD1)(AD0)—
to complete the addressing.
Table 12. Multiple Devices Addressing
AD1
AD0
Device Addressed
0
0
U1
0
1
U2
1
0
U3
1
1
U4
0
V
DD
R
P
R
P
+5V
V
DD
V
DD
U1
AD0
AD1
SDA SCL
MASTER
U2
AD0
AD1
SDA SCL
U3
AD0
AD1
SDA SCL
U4
AD0
AD1
SDA
SDA
SCL
SCL
Figure 37. Multiple AD5253/AD5254s on a Single Bus
In wireless base station smart antenna systems where arrays of
digital potentiometers may be needed to bias the power
amplifiers, large numbers of AD5253/AD5254s can be
addressed by using extra decoders, switches, and I/O buses, as
shown in Figure 38. For example, to communicate to a total of
16 devices, four decoders and 16 sets of combinational switches
(four sets shown in Figure 36) are needed. Two I/O buses serve
as the common inputs of the four 2 × 4 decoders and select four
sets of outputs at each combination. Because the four sets of
combination switch outputs are unique, as shown in Figure 38, a
specific device is addressed by proper I
2
C programming with
the slave address defined as 01011(AD1)(AD0). This operation
allows one out of 16 devices to be addressed, provided the
inputs of the two decoders do not change states. The decoders’
inputs are allowed to change once the operation of the specified
device is completed.
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