AD5255
For RDAC0 and RDAC1:
Rev. 0 | Page 18 of 20
( )
W
AB
WB
R
R
R
D
+
×
=
512
(1)
For RDAC2:
( )
W
AB
WB
R
R
R
D
+
×
=
128
(2)
where
D
is the decimal equivalent of the data contained in the
RDAC register and
R
W
is the wiper resistance.
The output resistance values in Table 11 are set for the given
RDAC latch codes with V
DD
= 5 V, which applies to R
AB
= 25 k
digital potentiometers.
Table 11. R
WB
at Selected Codes for R
WB_FS
= 25 k
D (DEC)
R
WB
(d) ()
Output State
511
25051
Full scale
256
12600
Midscale
1
148.8
1 LSB
0
100
Zero scale (wiper contact resistance)
Note that in the zero-scale condition, a finite wiper resistance of
100 is present. To avoid degradation or possible destruction
of the internal switches, care should be taken to limit the current
flow between W and B to no more than 20 mA intermittently or
2 mA continuously.
Channel-to-channel R
WB
matching is better than 0.1%. The
change in R
WB
with temperature has a 35 ppm/°C temperature
coefficient.
Like the mechanical potentiometer that the RDAC replaces, the
AD5255 parts are totally symmetrical. The resistance between
the W wiper and the A terminal also produces a digitally
controlled complementary resistance, R
WA
. When R
WA
is used,
the B terminal can be floating or tied to the wiper. Setting the
resistance value for R
WA
starts at a maximum value of resistance
and decreases as the data loaded in the latch is increased in
value. The general transfer equations for this operation are as
follows.
For RDAC0 and RDAC1:
( )
W
AB
WB
R
R
R
D
+
×
=
512
512
(3)
For RDAC2:
( )
W
AB
WB
R
R
R
D
+
×
=
128
128
(4)
For example, the following RDAC latch codes set the
corresponding output resistance values, which apply to
R
AB
= 25 k digital potentiometers.
Table 12. R
WA
(d) at Selected Codes for R
AB
= 25 k
D (DEC)
R
WA
(d) ()
511
148.8
256
12600
1
25051
0
25100
Output State
Full scale
Midscale
1 LSB
Zero scale
The typical distribution of R
AB
from channel-to-channel is
±0.1% within the same package. Device-to-device matching is
process lot-dependent, with a worst-case variation of ±15%. R
AB
temperature coefficient is 35 ppm/°C.
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer can be configured to generate an
output voltage at the wiper terminal that is proportional to the
input voltages applied to the A and B terminals. Connecting the
A terminal to 5 V and the B terminal to ground produces an
output voltage at the wiper that can vary between 0 V to 5 V.
Each LSB of voltage is equal to the voltage applied across the A
and B terminals divided by the 2
N
position resolution of the
potentiometer divider.
Since the AD5255 can operate from dual supplies, the general
equations defining the output voltage at V
W
with respect to
ground for any given input voltages applied to the A and B
terminals are as follows.
For RDAC0 and RDAC1:
( )
B
AB
W
V
V
D
V
+
×
=
512
(5)
For RDAC2:
( )
B
AB
W
V
V
D
V
+
×
=
128
(6)
Equation 5 assumes that V
W
is buffered so that the effect of
wiper resistance is nulled. Operation of the digital potentiometer
in the divider mode results in more accurate operation over
temperature. In this mode, the output voltage is dependent on
the ratio of the internal resistors, not on the absolute value;
therefore, the drift improves to 15 ppm/°C. There is no voltage
polarity restriction between the A, B, and W terminals as long as
the terminal voltage (V
TERM
) stays within V
SS
< V
TERM
< V
DD
.