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参数资料
| 型号： | AD5304 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | 2.5 V to 5.5 V, 500 uA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead microSOIC |
| 中文描述： | 2.5 V至5.5 V，500微安，四路电压输出数模转换器8-/10-/12-Bit在10引脚microSOIC |
| 文件页数： | 2/15页 |
| 文件大小： | 226K |
| 代理商： | AD5304 |
–2–
REV. B
AD5304/AD5314/AD5324–SPECIFICATIONS
(V
DD
= 2.5 V to 5.5 V; V
REF
= 2 V; R
L
= 2 k to
GND; C
L
= 200 pF to GND; All specifications T
MIN
to T
MAX
unless otherwise noted.)
Min
B Version
2
Typ
Parameter
1
Max
Unit
Conditions/Comments
DC PERFORMANCE
3, 4
AD5304
Resolution
Relative Accuracy
Differential Nonlinearity
AD5314
Resolution
Relative Accuracy
Differential Nonlinearity
AD5324
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
Gain Error
Lower Deadband
Offset Error Drift
5
Gain Error Drift
5
DC Power Supply Rejection Ratio
5
DC Crosstalk
DAC REFERENCE INPUTS
5
V
REF
Input Range
V
REF
Input Impedance
8
±
0.15
±
0.02
Bits
LSB
LSB
±
1
±
0.25
Guaranteed Monotonic by Design Over All Codes
10
±
0.5
±
0.05
Bits
LSB
LSB
±
4
±
0.5
Guaranteed Monotonic by Design Over All Codes
12
±
2
±
0.2
±
0.4
±
0.15
20
–12
–5
–60
200
Bits
LSB
LSB
% of FSR
% of FSR
mV
ppm of FSR/
°
C
ppm of FSR/
°
C
dB
μ
V
±
16
±
1
±
3
±
1
60
Guaranteed Monotonic by Design Over All Codes
See Figures 2 and 3
See Figures 2 and 3
Lower Deadband Exists Only If Offset Error Is Negative
V
DD
=
±
10%
R
L
= 2 k
to GND or V
DD
0.25
37
V
DD
V
k
M
dB
45
>10
–90
Normal Operation
Power-Down Mode
Frequency = 10 kHz
Reference Feedthrough
OUTPUT CHARACTERISTICS
5
Minimum Output Voltage
Maximum Output Voltage
6
DC Output Impedance
Short Circuit Current
0.001
V
DD
– 0.001
0.5
25
16
2.5
5
V
V
mA
mA
μ
s
μ
s
This is a measure of the minimum and maximum drive
capability of the output amplifier.
V
DD
= 5 V
V
DD
= 3 V
Coming Out of Power-Down Mode. V
DD
= 5 V
Coming Out of Power-Down Mode. V
DD
= 3 V
Power-Up Time
LOGIC INPUTS
5
Input Current
V
IL
, Input Low Voltage
±
1
0.8
0.6
0.5
μ
A
V
V
V
V
V
V
pF
V
DD
= 5 V
±
10%
V
DD
= 3 V
±
10%
V
DD
= 2.5 V
V
DD
= 5 V
±
10%
V
DD
= 3 V
±
10%
V
DD
= 2.5 V
V
IH
, Input High Voltage
2.4
2.1
2.0
Pin Capacitance
POWER REQUIREMENTS
V
DD
I
DD
(Normal Mode)
7
V
DD
= 4.5 V to 5.5 V
V
= 2.5 V to 3.6 V
I
DD
(Power-Down Mode)
V
DD
= 4.5 V to 5.5 V
V
DD
= 2.5 V to 3.6 V
3
2.5
5.5
V
600
500
900
700
μ
A
μ
A
V
IH
= V
DD
and V
IL
= GND
V
IH
= V
DD
and V
IL
= GND
0.2
0.08
1
1
μ
A
μ
A
V
IH
= V
DD
and V
IL
= GND
V
IH
= V
DD
and V
IL
= GND
NOTES
1
See Terminology.
2
Temperature range: B Version: –40
°
C to +105
°
C; typical at 25
°
C.
3
DC specifications tested with the outputs unloaded.
4
Linearity is tested using a reduced code range: AD5304 (Code 8 to 248); AD5314 (Code 28 to 995); AD5324 (Code 115 to 3981).
5
Guaranteed by design and characterization, not production tested.
6
In order for the amplifier output to reach its minimum voltage, Offset Error must be negative. In order for the amplifier output to reach its maximum voltage,
V
REF
= V
and “Offset plus Gain” Error must be positive.
7
I
DD
specification is valid for all DAC codes. Interface inactive. All DACs active. Load currents excluded.
Specifications subject to change without notice.
相关PDF资料 |
PDF描述 |
|---|---|
| AD5304BRM | 2.5 V to 5.5 V, 500 uA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead microSOIC |
| AD5324BRM | 2.5 V to 5.5 V, 500 uA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead microSOIC |
| AD5314 | Dual Rail-To-Rail,Voltage Output 10-Bit DACs(满幅度电压输出双10位D/A转换器) |
| AD5320 | +2.7 V to +5.5 V, 140 uA, Rail-to-Rail Output 12-Bit DAC in a SOT-23 |
| AD5320BRM | +2.7 V to +5.5 V, 140 uA, Rail-to-Rail Output 12-Bit DAC in a SOT-23 |
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