参数资料
| 型号： | AD5312BRMZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 23/24页 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT DUAL R-R 10-MSOP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 50 |
| 设置时间： | 6µs |
| 位数： | 10 |
| 数据接口： | 串行 |
| 转换器数目： | 2 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 2.5mW |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 管件 |
| 输出数目和类型： | 2 电压，单极；2 电压，双极 |
| 采样率（每秒）： | 143k |
| 产品目录页面： | 782 (CN2011-ZH PDF) |
AD5302/AD5312/AD5322
Rev. D | Page 8 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
LDAC 1
VDD 2
VREFB 3
VREFA 4
VOUTA 5
GND
10
DIN
9
SCLK
8
SYNC
7
VOUTB
6
AD5302/
AD5312/
AD5322
TOP VIEW
(Not to Scale)
00
92
8-
00
3
Figure 5. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
LDAC
Active Low Control Input. This pin transfers the contents of the input registers to their respective DAC registers.
Pulsing LDAC low allows either or both DAC registers to be updated if the input registers have new data. This
allows simultaneous updating of both DAC outputs.
2
VDD
Power Supply Input. The parts can be operated from 2.5 V to 5.5 V, and the supply should be decoupled to GND.
3
VREFB
Reference Input Pin for DAC B. This is the reference for DAC B. It can be configured as a buffered or an
unbuffered input, depending on the BUF bit in the control word of DAC B. It has an input range of 0 V to VDD in
unbuffered mode and 1 V to VDD in buffered mode.
4
VREFA
Reference Input Pin for DAC A. This is the reference for DAC A. It can be configured as a buffered or an
unbuffered input depending on the BUF bit in the control word of DAC A. It has an input range of 0 V to VDD in
unbuffered mode and 1 V to VDD in buffered mode.
5
VOUTA
Buffered Analog Output Voltage from DAC A. The output amplifier has rail-to-rail operation.
6
VOUTB
Buffered Analog Output Voltage from DAC B. The output amplifier has rail-to-rail operation.
7
SYNC
Active Low Control Input. This is the frame synchronization signal for the input data. When SYNC goes low, it
powers on the SCLK and DIN buffers and enables the input shift register. Data is transferred in on the falling
edges of the following 16 clocks. If SYNC is taken high before the 16th falling edge, the rising edge of SYNC acts
as an interrupt and the write sequence is ignored by the device.
8
SCLK
Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data
can be transferred at rates up to 30 MHz. The SCLK input buffer is powered down after each write cycle.
9
DIN
Serial Data Input. This device has a 16-bit input shift register. Data is clocked into the register on the falling
edge of the serial clock input. The DIN input buffer is powered down after each write cycle.
10
GND
Ground Reference Point for All Circuitry on the Part.
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相关代理商/技术参数 |
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| AD5312BRMZ-REEL | 功能描述:IC DAC 10BIT DUAL R-R 10-MSOP TR RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色产品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 标准包装:91 系列:- 设置时间:4µs 位数:10 数据接口:MICROWIRE?，串行，SPI? 转换器数目:8 电压电源:单电源 功率耗散（最大）:2.7mW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:14-WFDFN 裸露焊盘 供应商设备封装:14-DFN-EP（4x3） 包装:管件 输出数目和类型:8 电压，单极 采样率（每秒）:* |
| AD5312BRMZ-REEL7 | 功能描述:IC DAC 10BIT DUAL R-R 10-MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色产品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 标准包装:91 系列:- 设置时间:4µs 位数:10 数据接口:MICROWIRE?，串行，SPI? 转换器数目:8 电压电源:单电源 功率耗散（最大）:2.7mW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:14-WFDFN 裸露焊盘 供应商设备封装:14-DFN-EP（4x3） 包装:管件 输出数目和类型:8 电压，单极 采样率（每秒）:* |
| AD5312WARMZ-REEL7 | 制造商:Analog Devices 功能描述:AUTO VERSION! 2.5 V TO 5.5 V, 230 ?A, DUAL RAIL-TO-RAIL VOLT - Tape and Reel 制造商:Analog Devices 功能描述:ANAAD5312WARMZ-REEL7 DUAL 10-BIT VOLTAGE |
| AD5313 | 制造商:AD 制造商全称:Analog Devices 功能描述:2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs |
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