参数资料
型号: AD53508JP
厂商: ANALOG DEVICES INC
元件分类: 其它接口
英文描述: PPMU Circuit
中文描述: SPECIALTY INTERFACE CIRCUIT, PQCC44
封装: PLASTIC, LCC-44
文件页数: 2/8页
文件大小: 125K
代理商: AD53508JP
–2–
REV. 0
AD53508–SPECIFICATIONS
Parameter
Condition
Min
Typ
Max
Unit
1
VOLTAGE FORCE/MEASURE MODE
Voltage Swing,
±
2 mA Range
±
2 mA Drive
±
100
μ
A Drive
ACCURACY
Gain (
±
0.1% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Current Measure CMRR (at MEAS_OUT)
–4
–5
+9
+12
V
V
0.999
1.001
±
15
±
0.02
±
0.31
V/V
mV
% of Span
mV/V
DRIFT
Gain Error Temperature Coefficient
±
20
ppm (PV
or MV)/
°
C
μ
V/
°
C
Offset Drift
±
100
CURRENT FORCE/MEASURE MODE RANGES
0 (High)
1 (Low)
±
2.0
±
200
mA
μ
A
ACCURACY—HIGH RANGE
Transconductance (
±
3% Tolerance)
Transresistance (
±
3% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Output Compliance Voltage-Induced
Transconductance/Error
Force Mode
Measure Mode
0.776
1.21
0.8
1.25
0.824
1.29
±
40
±
0.05
mA/V
V/mA
μ
A
% of Span
Force Mode
–0.2
+0.4
μ
A/V
DRIFT—HIGH RANGE
Gain Error Temperature Coefficient
+10/–60
ppm (PV
or MV)/
°
C
nA/
°
C
Offset Drift
±
400
ACCURACY—LOW RANGE
Transconductance (
±
3% Tolerance)
Transresistance (
±
3% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Output Compliance Voltage-Induced
Transconductance/Error
Force Mode
Measure Mode
77.6
12.1
80
12.5
82.4
12.9
±
4
±
0.05
μ
A/V
V/mA
μ
A
% of Span
Force Mode
–0.02
+0.04
μ
A/V
DRIFT—LOW RANGE
Gain Error Temperature Coefficient
+10/–60
ppm (PV
or MV)/
°
C
nA/
°
C
Offset Drift
±
40
CURRENT MEASURE INTEGRATE MODE RANGES
High
Medium
Low
±
20.0
±
2.0
±
200
μ
A
μ
A
nA
ACCURACY—HIGH RANGE
Transresistance Error (
±
3% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Output Compliance Voltage-Induced Transresistance Error
0.121
0.125
0.129
±
400
±
0.05
±
2.5
V/
μ
A
nA
% of Span
nA/V of Output
DRIFT—HIGH RANGE
Gain Error Temperature Coefficient
Offset Drift
±
20
±
2
ppm MV/
°
C
nA/
°
C
ACCURACY—MEDIUM RANGE
Transresistance Error (
±
3% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Output Compliance Voltage-Induced Transresistance Error
1.21
1.25
1.29
±
40
±
0.05
±
0.25
V/
μ
A
nA
% of Span
nA/V of Output
DRIFT— MEDIUM RANGE
Gain Error Temperature Coefficient
Offset Drift
±
20
±
250
ppm MV/
°
C
pA/
°
C
(T
A
= 25 C, rated power supplies unless otherwise noted)
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