参数资料
型号: AD5432YRMZ-REEL
厂商: Analog Devices Inc
文件页数: 13/25页
文件大小: 0K
描述: IC DAC 10BIT MULTIPLYING 10-MSOP
产品培训模块: Data Converter Fundamentals
DAC Architectures
设计资源: Unipolar, Precision DC Digital-to-Analog Conversion Using AD5426/32/43 8-Bit to12-Bit DACs (CN0034)
Precision, Bipolar Configuration for the AD5426/32/43 8-Bit to12-Bit DACs (CN0036)
AC Signal Processing Using AD5426/32/43 Current Output DACs (CN0037)
Programmable Gain Element Using AD5426/32/43 Current Output DACs (CN0038)
标准包装: 3,000
位数: 10
数据接口: 串行
转换器数目: 1
电压电源: 单电源
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-MSOP
包装: 带卷 (TR)
输出数目和类型: 2 电流,单极;2 电流,双极
采样率(每秒): 2.5M
Data Sheet
AD5426/AD5432/AD5443
Rev. G | Page 19 of 24
a fraction (~ <1/4) of an LSB to ensure monotonic behavior
when stepping through codes.
The input bias current of an op amp also generates an offset at
the voltage output as a result of the bias current flowing in the
feedback resistor, RFB. Most op amps have input bias currents low
enough to prevent any significant errors in 12-bit applications.
Common-mode rejection of the op amp is important in voltage
switching circuits since it produces a code-dependent error at
the voltage output of the circuit. Most op amps have adequate
common-mode rejection at an 8-, 10-, or 12-bit resolution.
Provided the DAC switches are driven from true wideband low
impedance sources (VIN and AGND), they settle quickly.
Consequently, the slew rate and settling time of a voltage switching
DAC circuit is determined largely by the output op amp.
To obtain minimum settling time in this configuration, it is
important to minimize capacitance at the VREF of the DAC. This
is done by using low input capacitance buffer amplifiers and
careful board design. Most single-supply circuits include ground as
part of the analog signal range, which in turn requires an amplifier
that can handle rail-to-rail signals,. There is a large range of
single-supply amplifiers available from Analog Devices.
Table 7. Suitable ADI Precision References
Part No.
OutputVoltage (V)
InitialTolerance (%)
Temp Drift (ppm/°C)
ISS (mA)
Output Noise V p-p
Package
ADR01
10
0.05
3
1
20
SOIC-8
ADR01
10
0.05
9
1
20
TSOT-23, SC70
ADR02
5
0.06
3
1
10
SOIC-8
ADR02
5
0.06
9
1
10
TSOT-23, SC70
ADR03
2.5
0.10
3
1
6
SOIC-8
ADR03
2.5
0.10
9
1
6
TSOT-23, SC70
ADR06
3
0.10
3
1
10
SOIC-8
ADR06
3
0.10
9
1
10
TSOT-23, SC70
ADR431
2.5
0.04
3
0.8
3.5
SOIC-8
ADR435
5
0.04
3
0.8
8
SOIC-8
ADR391
2.5
0.16
9
0.12
5
TSOT-23
ADR395
5
0.10
9
0.12
8
TSOT-23
Table 8. Suitable ADI Precision Op Amps
Part No.
Supply Voltage (V)
VOS (Max) (V)
IB (Max) (nA)
0.1 Hz to 10 Hz
Noise (V p-p)
Supply Current (A)
Package
OP97
±2 to ±20
25
0.1
0.5
600
SOIC-8
OP1177
±2.5 to ±15
60
2
0.4
500
MSOP, SOIC-8
AD8551
2.7 to 5
5
0.05
1
975
MSOP, SOIC-8
AD8603
1.8 to 6
50
0.001
2.3
50
TSOT
AD8628
2.7 to 6
5
0.1
0.5
850
TSOT, SOIC-8
Table 9. Suitable ADI High Speed Op Amps
Part No.
Supply Voltage (V)
BW @ ACL (MHz)
Slew Rate (V/s)
VOS (Max) (V)
IB (Max) (nA)
Package
AD8065
5 to 24
145
180
1,500
6,000
SOIC-8, SOT-23, MSOP
AD8021
±2.5 to ±12
490
100
1,000
10,500
SOIC-8, MSOP
AD8038
3 to 12
350
425
3,000
750
SOIC-8, SC70-5
AD9631
±2 to ±6
320
1,300
10,000
7,000
SOIC-8
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