参数资料
型号: AD5530BRUZ
厂商: Analog Devices Inc
文件页数: 9/20页
文件大小: 0K
描述: IC DAC 12BIT SRL IN/VOUT 16TSSOP
产品培训模块: Data Converter Fundamentals
DAC Architectures
标准包装: 96
设置时间: 20µs
位数: 12
数据接口: 串行
转换器数目: 1
电压电源: 模拟和数字
功率耗散(最大): 60mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 管件
输出数目和类型: 1 电压,双极
采样率(每秒): 50k
产品目录页面: 782 (CN2011-ZH PDF)
AD5530/AD5531
Rev. B | Page 17 of 20
APPLICATIONS INFORMATION
SERIAL INTERFACE TO MULTIPLE AD5530s OR
AD5531s
OPTOCOUPLER INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled. Opto-isolators can provide voltage isolation in
excess of 3 kV. The serial loading structure of the AD5530/
AD5531 makes it ideal for opto-isolated interfaces because the
number of interface lines is kept to a minimum.
SYNC
shows a 4-channel isolated interface to the AD5530/AD5531.
To reduce the number of opto-isolators, if simultaneous
updating is not required, then the LDAC pin can be tied
permanently low.
00
93
8-
02
6
CONTROLLER
CONTROL OUT
TO LDAC
SYNC OUT
TO SYNC
SERIAL CLOCK OUT
TO SCLK
SERIAL DATA OUT
TO SDIN
OPTOCOUPLER
VCC
Figure 26. Opto-Isolated Interface
Figure 27 shows how the
pin is used to address multiple
AD5530/AD5531s. All devices receive the same serial clock and
serial data, but only one device receives the SYNC signal at any
one time. The DAC addressed is determined by the decoder.
There is some feedthrough from the digital input lines, the
effects of which can be minimized by using a burst clock.
00
93
8-
0
27
AD5530/AD55311
VOUT
SYNC
SDIN
SCLK
AD5530/AD55311
VOUT
SYNC
SDIN
SCLK
AD5530/AD55311
VOUT
SYNC
SDIN
SCLK
AD5530/AD55311
VOUT
SYNC
SDIN
SCLK
SDIN
VCC
DECODER1
ENABLE
EN
CODED
ADDRESS
DGND
1ADDITIONAL PINS
OMITTED FOR CLARITY.
Figure 27. Addressing Multiple AD5530/AD5531s
DAISY-CHAINING INTERFACE WITH MULTIPLE AD5530s OR AD5531s
A number of these DAC parts can be daisy-chained together using the SDO pin. Figure 28 illustrates such a configuration.
0
09
38
-02
8
AD5530/AD55311
SDO
SCLK
SDIN
SYNC
SCLK
SDIN
SYNC
AD5530/AD55311
SDO
SCLK
SDIN
SYNC
AD5530/AD55311
SDO
SCLK
SDIN
SYNC
TO OTHER
SERIAL DEVICES
VDD
R
1ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 28. Daisy-Chaining Multiple AD5530/AD5531s
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