参数资料
| 型号： | AD5583YRVZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/20页 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT QUAD VOUT 48-TSSOP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 39 |
| 设置时间： | 5µs |
| 位数： | 10 |
| 数据接口： | 并联 |
| 转换器数目： | 4 |
| 电压电源： | 模拟和数字，双 ± |
| 功率耗散（最大）： | 30mW |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 管件 |
| 输出数目和类型： | 4 电压，单极；4 电压，双极 |
| 采样率（每秒）： | 200k |
| 产品目录页面： | 783 (CN2011-ZH PDF) |
REV. A
–18–
AD5582/AD5583
In this circuit, the inverting input of the op amp forces the VO to
be equal to the DAC output. The load current is then delivered by
the supply via the N-Ch FET N1. U3 needs to be a rail-to-rail
input type. With a VDD of 5 V, this circuit can source a maximum
of 200 mA at 4.096 V full scale, 100 mA at midscale, and 50 mA
near zero-scale outputs. Higher current can be achieved with N1
in a larger package mounted on a heat sink.
Programmable PGA
The AD603 is a low noise, voltage controlled amplifier for use in
RF and IF AGC (automatic gain control) systems. It provides
accurate, pin selectable gains of –11 dB to +31 dB with a band-
width of 90 MHz, or 9 dB to 51 dB with a bandwidth of 9 MHz.
Any intermediate gain range may be arranged using one external
resistor between Pin 5 and Pin 7. The input referred noise spectral
density is only 1.3 nV/
÷Hz and power consumption is 125 mW
at the recommended
±5 V supplies.
U4
AD8565
–
+
U1
AD5582
VREFHA
VREFHB
VREFHC
VREFHD
VREFLA
VREFLB
VREFLC
VREFLD
VOA VOB VDD1-TO-3 VOC VOD
DVDD
VSS1-TO-3
–IN
U2
ADR510
+IN
–IN
U3
ADR510
+IN
DECOUPLING CAPS ARE OMITTED FOR CLARITY
R1
10k
R2
10k
VDD
1.0V
2.0V
VDD
R4
50k
R3
50k
VDD
R1
100
VIN
G–
G+
VINP
V–
V+
OUT
U5
AD603
0.1 F
C1
VDD
COMM
FDBK
G–
G+
VINP
V–
V+
OUT
U6
AD603
VDD
COMM
FDBK
+10V
VO
0.1 F
C2
0.1 F
C3
Figure 8. Programmable PGA
The decibel gain is linear in dB, accurately calibrated, and stable
over temperature and supply. The gain is controlled at a high
impedance (50 M
W), low bias (200 nA) differential input; the
scaling is 25 mV/dB, requiring a gain control voltage of only 1 V
to span the central 40 dB of the gain range. An overrange and
underrange of 1 dB is provided whatever the selected range. The
gain control response time is less than 1 ms for a 40 dB change.
The differential gain control interface allows the use of either
differential or single-ended positive or negative control voltages,
where the common-mode range is –1.2 V to +2.0 V. The
AD5582/AD5583 is ideally suited to provide the differential
input range of 1 V within the common-mode range of 0 V to 2 V.
To accomplish this, place VREFH at 2.0 V and VREFL at 1.0 V,
then all 4096 V levels of the AD5582 will fall within the gain
control range of the AD603. Please refer to the AD603 data
sheet for further information regarding gain control, layout, and
general operation.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD5583YRVZ-REEL | 功能描述:IC DAC 10BIT QUAD VOUT 48-TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:47 系列:- 设置时间:2µs 位数:14 数据接口:并联 转换器数目:1 电压电源:单电源 功率耗散（最大）:55µW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:管件 输出数目和类型:1 电流，单极；1 电流，双极 采样率（每秒）:* |
| AD558J | 制造商:AD 制造商全称:Analog Devices 功能描述:DACPORT Low Cost, Complete uP-Compatible 8-Bit DAC |
| AD558JCHIPS | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Digital-to-Analog Converter |
| AD558JD | 功能描述:IC DAC 8BIT 5-15V IN MONO 16CDIP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:DACPORT® 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:750 系列:- 设置时间:7µs 位数:16 数据接口:并联 转换器数目:1 电压电源:双 ± 功率耗散（最大）:100mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-LCC（J 形引线） 供应商设备封装:28-PLCC（11.51x11.51） 包装:带卷 (TR) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:143k |
| AD558JN | 功能描述:IC DAC 8BIT V-OUT 16-DIP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:DACPORT® 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:750 系列:- 设置时间:7µs 位数:16 数据接口:并联 转换器数目:1 电压电源:双 ± 功率耗散（最大）:100mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-LCC（J 形引线） 供应商设备封装:28-PLCC（11.51x11.51） 包装:带卷 (TR) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:143k |
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