参数资料
| 型号： | AD5722AREZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/32页 |
| 文件大小： | 0K |
| 描述： | IC DAC DUAL 12BIT 1LSB 24TSSOP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 设计资源： | Software Configurable 12-Bit Dual-Channel Unipolar/Bipolar Voltage Output Using AD5722 (CN0094) |
| 标准包装： | 62 |
| 设置时间： | 10µs |
| 位数： | 12 |
| 数据接口： | 串行 |
| 转换器数目： | 2 |
| 电压电源： | 模拟和数字，双 ± |
| 功率耗散（最大）： | 190mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 供应商设备封装： | 24-TSSOP 裸露焊盘 |
| 包装： | 管件 |
| 输出数目和类型： | 2 电压，单极；2 电压，双极 |
| 采样率（每秒）： | * |
| 产品目录页面： | 784 (CN2011-ZH PDF) |
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AD5722/AD5732/AD5752
Rev. D | Page 26 of 32
CONTROL REGISTER
The control register is addressed by setting the three REG bits to 011. The value written to the address and data bits determines the
Table 23. Programming the Control Register
MSB
LSB
R/W
Zero
REG2
REG1
REG0
A2
A1
A0
DB15 to DB4
DB3
DB2
DB1
DB0
0
1
0
NOP, data = don’t care
0
1
0
1
Don’t care
TSD enable
Clamp enable
CLR select
SDO disable
0
1
0
Clear, data = don’t care
0
1
0
1
Load, data = don’t care
Table 24. Explanation of Control Register Options
Option
Description
NOP
No operation instruction used in readback operations.
Clear
Addressing this function sets the DAC registers to the clear code and updates the outputs.
Load
Addressing this function updates the DAC registers and, consequently, the DAC outputs.
SDO Disable
Set by the user to disable the SDO output. Cleared by the user to enable the SDO output (default).
CLR Select
See Table 25 for a description of the CLR select operation.
Clamp Enable
Set by the user to enable the current-limit clamp. The channel does not power down upon detection of an overcurrent; the
current is clamped at 20 mA (default).
Cleared by the user to disable the current-limit clamp. The channel powers down upon detection of an overcurrent.
TSD Enable
Set by the user to enable the thermal shutdown feature. Cleared by the user to disable the thermal shutdown feature (default).
Table 25. CLR Select Options
Output CLR Value
CLR Select Setting
Unipolar Output Range
Bipolar Output Range
0
0 V
1
Midscale
Negative full-scale
POWER CONTROL REGISTER
The power control register is addressed by setting the three REG bits to 010. This register allows the user to control and determine the
power and thermal status of the AD5722/AD5732/AD5752. The power control register options are shown in Table 26 and Table 27.
Table 26. Programming the Power Control Register
MSB
LSB
R/W
Zero
REG2
REG1
REG0
A2
A1
A0
DB15 to
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
1
0
X
0
OCB
X
OCA
X
TSD
X
PUB
X
PUA
Table 27. Power Control Register Functions
Option
Description
PUA
DAC A power-up. When set, this bit places DAC A in normal operating mode. When cleared, this bit places DAC A in power-down
mode (default). After setting this bit to power DAC A, a power-up time of 10 μs is required. During this power-up time, the DAC
register should not be loaded to the DAC output (see the Load DAC (LDAC) section). If the clamp enable bit of the control register
is cleared, DAC A powers down automatically on detection of an overcurrent, and PUA is cleared to reflect this.
PUB
DAC B power-up. When set, this bit places DAC B in normal operating mode. When cleared, this bit places DAC B in power-down
mode (default). After setting this bit to power DAC B, a power-up time of 10 μs is required. During this power-up time, the DAC
register should not be loaded to the DAC output (see the Load DAC (LDAC) section). If the clamp enable bit of the control register
is cleared, DAC B powers down automatically on detection of an overcurrent, and PUB is cleared to reflect this.
TSD
Thermal shutdown alert (read-only bit). In the event of an overtemperature situation, both DACs are powered down and this bit is set.
OCA
DAC A overcurrent alert (read-only bit). In the event of an overcurrent situation on DAC A, this bit is set.
OCB
DAC B overcurrent alert (read-only bit). In the event of an overcurrent situation on DAC B, this bit is set.
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| AD5722AREZ-REEL7 | 功能描述:IC DAC DUAL 12BIT 1LSB 24TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色产品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 标准包装:91 系列:- 设置时间:4µs 位数:10 数据接口:MICROWIRE?，串行，SPI? 转换器数目:8 电压电源:单电源 功率耗散（最大）:2.7mW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:14-WFDFN 裸露焊盘 供应商设备封装:14-DFN-EP（4x3） 包装:管件 输出数目和类型:8 电压，单极 采样率（每秒）:* |
| AD5722R | 制造商:AD 制造商全称:Analog Devices 功能描述:Complete, Dual, 12-/14-/16-Bit, Serial Input, Unipolar/Bipolar, Voltage Output DACs |
| AD5722RBREZ | 功能描述:IC DAC DUAL 12BIT 1LSB 24TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 设置时间:4µs 位数:12 数据接口:串行 转换器数目:2 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-uMAX 包装:管件 输出数目和类型:2 电压，单极 采样率（每秒）:* 产品目录页面:1398 (CN2011-ZH PDF) |
| AD5722RBREZ-REEL7 | 功能描述:IC DAC DUAL 12BIT 1LSB 24TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:47 系列:- 设置时间:2µs 位数:14 数据接口:并联 转换器数目:1 电压电源:单电源 功率耗散（最大）:55µW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:管件 输出数目和类型:1 电流，单极；1 电流，双极 采样率（每秒）:* |
| AD5724 | 制造商:AD 制造商全称:Analog Devices 功能描述:Complete, Quad, 12-/14-/16-Bit, Serial Input, Unipolar/Bipolar Voltage Output DACs |
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