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| 型号： | AD637JQ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/21页 |
| 文件大小： | 0K |
| 描述： | IC RMS/DC CONV PRECISION 14-CDIP |
| 产品培训模块： | Introduction to Analog RMS-to-DC Technology: Converters and Applications |
| 标准包装： | 25 |
| 电流 - 电源： | 2.2mA |
| 电源电压： | ±3 V ~ 18 V |
| 安装类型： | 通孔 |
| 封装/外壳： | 14-CDIP（0.300"，7.62mm） |
| 供应商设备封装： | 14-CERDIP |
| 包装： | 管件 |
| 产品目录页面： | 786 (CN2011-ZH PDF) |
| 配用： | AD637-EVALZ-ND - BOARD EVALUATION FOR AD637 |
AD637
1 BUFF IN
2 NC
3 COMMON
AD637
ABSOLUTE
VALUE
BUFF
OUT 14
V IN 13
NC 12
RMS OUT
V IN
+
C3
100
10
100
10
OUTPUT
4 OFFSET
BIAS
SQUARER/
DIVIDER
+V S
11
+V S
1.0
1.0
+V S 4.7k ? 5 CS
DEN
6 INPUT 25k ?
25k ?
–V S
10
9
–V S
0.1
0.1
+ C AV
7 dB OUTPUT
C AV 8
0.01
*%dc ERROR + %RIPPLE (PEAK)
0.01
1
10
100 1k
10k
100k
INPUT FREQUENCY (Hz)
RX
24k ?
24k ?
Figure 12. Values for C AV and 1% Settling Time for Stated % of Reading Averaging
+
C2
FOR A SINGLE-POLE
FILTER SHORT RX
AND REMOVE C3
Figure 11. 2-Pole Sallen-Key Filter
Error* Accuracy Includes ±2% Component Tolerance (see * in Figure)
100 100
*%dc ERROR + %RIPPLE (PEAK)
ACCURACY ±20% DUE TO
COMPONENT TOLERANCE
error as a function of sine wave frequency for the standard rms
connection. The 1% settling time is shown on the right side of
signal frequency settling time, and averaging capacitor value.
averaging capacitor value. This ratio sets the magnitude of the
10
1
0.1
10
1
0.1
ac and dc errors equal at 50 Hz. As an example, by using a 1 μF
averaging capacitor and a 3.3 μF filter capacitor, the ripple for
0.01
1
10
100 1k
10k
0.01
100k
a 60 Hz input signal is reduced from 5.3% of the reading using
the averaging capacitor alone to 0.15% using the 1-pole filter.
This gives a factor of 30 reduction in ripple, and yet the settling
INPUT FREQUENCY (Hz)
Figure 13. Values of C AV , C2, and 1% Settling Time for Stated % of Reading
Averaging Error* for 1-Pole Post Filter (see * in Figure)
time only increases by a factor of 3. The values of filter
Capacitor C AV and Filter Capacitor C2 can be calculated for
the desired value of averaging error and settling time by using
The symmetry of the input signal also has an effect on the
magnitude of the averaging error. Table 5 gives the practical
component values for various types of 60 Hz input signals.
These capacitor values can be directly scaled for frequencies
other than 60 Hz—that is, for 30 Hz, these values are doubled,
and for 120 Hz they are halved.
100
10
1
0.1
100
10
1
0.1
For applications that are extremely sensitive to ripple, the 2-pole
configuration is suggested. This configuration minimizes capacitor
values and the settling time while maximizing performance.
*%dc ERROR + %RIPPLE (PEAK)
ACCURACY ±20% DUE TO
COMPONENT TOLERANCE
0.01 0.01
1 10 100 1k 10k 1 00k
INPUT FREQUENCY (Hz)
Figure 14. Values of C AV , C2, and C3 and 1% Settling Time for Stated % of
Reading Averaging Error* for 2-Pole Sallen-Key Filter (see * in Figure)
C2, and C3 for the desired level of ripple and settling time.
Rev. K | Page 10 of 20
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| AD637JR | 功能描述:IC TRUE RMS/DC CONV WDBND 16SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - RMS 至 DC 转换器 系列:- 标准包装:46 系列:- 电流 - 电源:1.2mA 电源电压:±18 V，36 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC W 包装:管件 |
| AD637JR-REEL | 功能描述:IC RMS/DC CONV PRECISION 16-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - RMS 至 DC 转换器 系列:- 标准包装:46 系列:- 电流 - 电源:1.2mA 电源电压:±18 V，36 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC W 包装:管件 |
| AD637JR-REEL7 | 功能描述:IC RMS/DC CONV PRECISION 16-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - RMS 至 DC 转换器 系列:- 标准包装:46 系列:- 电流 - 电源:1.2mA 电源电压:±18 V，36 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC W 包装:管件 |
| AD637JRZ | 功能描述:IC RMS/DC CONV PREC WB 16-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - RMS 至 DC 转换器 系列:- 标准包装:46 系列:- 电流 - 电源:1.2mA 电源电压:±18 V，36 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC W 包装:管件 |
| AD637JRZ | 制造商:Analog Devices 功能描述:RMS to DC Converter (RMS/DC) IC 制造商:Analog Devices 功能描述:IC, RMS-DC CONV, 0.25%, 8MHZ, SOIC-16 |
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