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参数资料
| 型号： | AD654 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Low Cost Monolithic Voltage-to-Frequency Converter(低成本单片电压-频率转换器) |
| 中文描述： | 低成本单片电压频率转换器（低成本单片电压-频率转换器） |
| 文件页数： | 3/8页 |
| 文件大小： | 307K |
| 代理商： | AD654 |
AD654
REV. A
–3–
ABSOLUTE MAXIMUM RATING
Total Supply Voltage +V
S
to –V
S
. . . . . . . . . . . . . . . . . . .36 V
Maximum Input Voltage
(Pins 3, 4) to –V
S
. . . . . . . . . . . . . . . . . . . . .–300 mV to +V
S
Maximum Output Current
Instantaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Sustained . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Logic Common to –V
S
. . . . . . . . . . . . . . . –500 mV to (+V
S
–4)
Storage Temperature Range . . . . . . . . . . . . .–65
°
C to +150
°
C
CIRCUIT OPERATION
The AD654’s block diagram appears in Figure 1. A versatile
operational amplifier serves as the input stage; its purpose is to
convert and scale the input voltage signal to a drive current in
the NPN follower. Optimum performance is achieved when, at
the full-scale input voltage, a 1 mA drive current is delivered to
the current-to-frequency converter (an astable multivibrator).
The drive current provides both the bias levels and the charging
current to the externally connected timing capacitor. This
“adaptive” bias scheme allows the oscillator to provide low non-
linearity over the entire current input range of 100 nA to 2 mA.
The square wave oscillator output goes to the output driver
which provides a floating base drive to the NPN power transis-
tor. This floating drive allows the logic interface to be refer-
enced to a level other than –V
S
.
Figure 1. Standard V-F Connection for Positive Input
Voltages
V/F CONNECTION FOR POSITIVE INPUT VOLTAGES
In the connection scheme of Figure 1, the input amplifier pre-
sents a very high (250 M
) impedance to the input voltage,
which is converted into the proper drive current by the scaling
resistors at Pin 3. Resistors R1 and R2 are selected to provide a
1 mA full-scale current with enough trim range to accommodate
the AD654’s 10% FS error and the components’ tolerances.
Full-scale currents other than 1 mA can be chosen, but linearity
will be reduced; 2 mA is the maximum allowable drive. The
AD654’s positive input voltage range spans from –V
S
(ground in
sink supply operation) to four volts below the positive supply.
Power supply rejection degrades as the input exceeds (+V
S
–
3.75 V) and at (+V
S
– 3.5 V) the output frequency goes to zero.
As indicated by the scaling relationship in Figure 1, a 0.01
μ
F
timing capacitor will give a 10 kHz full-scale frequency, and 0.001
μ
F will give 100 kHz with a 1 mA drive current. Good V/F linearity
requires the use of a capacitor with low dielectric absorption
(DA), while the most stable operation over temperature calls
*Teflon is a trademark of E.I. Du Pont de Nemours & Co.
for a component having a small tempco. Polystyrene, polypropy-
lene, or Teflon* capacitors are preferred for tempco and dielec-
tric absorption; other types will degrade linearity. The capacitor
should be wired very close to the AD654. In Figure 1, Schottky
diode CR1 (MBD101) prevents logic common from dropping
more than 500 mV below –V
S
. This diode is not
required if –V
S
is equal to logic common.
V/F CONNECTIONS FOR NEGATIVE INPUT VOLTAGE
OR CURRENT
The AD654 can accommodate a wide range of negative input
voltages with proper selection of the scaling resistor, as indicated
in Figure 2. This connection, unlike the buffered positive con-
nection, is not high impedance because the signal source must
supply the 1 mA FS drive current. However, large negative volt-
ages beyond the supply can be handled easily by modifying the
scaling resistors appropriately. If the input is a true current
source, R1 and R2 are not used. Again, diode CR1 prevents
latch-up by insuring Logic Common does not drop more than
500 mV below –V
S
. The clamp diode (MBD101) protects the
AD654 input from “below –V
S
” inputs.
Figure 2. V-F Connections for Negative Input Voltages or
Current
Figure 3a. Bias Current Compensation—Positive Inputs
Figure 3b. Bias Current Compensation—Negative Inputs
If the AD654’s 1 mV offset voltage must be trimmed, the trim
must be performed external to the device. Figure 3c shows an
optional connection for positive inputs in which R
OFF1
and
R
OFF2
add a variable resistance in series with R
T
. A variable
source of
±
0.6 V applied to R
OFF1
then adjusts the offset
±
1 mV.
Similarly, a
±
0.6 V variable source is applied to R
OFF
in Fig-
ure 3d to trim offset for negative inputs. The
±
0.6 V bipolar
source could simply be an AD589 reference connected as shown
in Figure 3e.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD654JCHIPS | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Voltage-to-Frequency Converter |
| AD654JN | 功能描述:IC V-F CONVERTER MONO 8-DIP RoHS:否 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
| AD654JN/+ | 制造商:Rochester Electronics LLC 功能描述:IC - LOW COST V/F CONV. - Bulk |
| AD654JNZ | 功能描述:IC V-F CONVERTER MONO 8-DIP RoHS:是 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
| AD654JNZ/+ | 功能描述:IC CONV VOLT-FREQ 500KHZ 8DIP RoHS:是 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
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