AD667
REV. A
–4–
PIN CONNECTIONS
ORDERING GUIDE
Linearity
Gain
Temperature
Error Max TC Max
Model
l
Range— C
@ +25 C
ppm/ C Package Option
2
AD667JN
0 to +70
±1/2 LSB
30
Plastic DIP (N-28)
AD667JP
0 to +70
±1/2 LSB
30
PLCC (P-28A)
AD667KN
0 to +70
±1/4 LSB
15
Plastic DIP (N-28)
AD667KP
0 to +70
±1/4 LSB
15
PLCC (P-28A)
AD667AD
25 to +85
±1/2 LSB
30
Ceramic DIP (D-28)
AD667BD
–25 to +85
±1/4 LSB
15
Ceramic DIP (D-28)
AD667SD
–55 to +125
±1/2 LSB
30
Ceramic DIP (D-28)
AD667SE
–55 to +125
±1/2 LSB
30
LCC (E-28A)
AD667/883B –55 to +125
*
NOTES
*Refer to AD667/883B military data sheet.
1For details on grade and package offerings screened in accordance with MIL-STD-
883, refer to the Analog Devices Military Products Databook or current AD667/
883B data sheet.
2D = Ceramic DIP; E = Leadless Ceramic Chip Carrier; N = Plastic DIP;
P = Plastic Leaded Chip.
THE AD667 OFFERS TRUE 12-BIT PERFORMANCE
OVER THE FULL TEMPERATURE RANGE
LINEARITY ERROR: Analog Devices defines linearity error as
the maximum deviation of the actual, adjusted DAC output
from the ideal analog output (a straight line drawn from 0 to FS
– 1 LSB) for any bit combination. The AD667 is laser trimmed
to 1/4 LSB (0.006% of FS) maximum error at +25
°C for the K
and B versions and 1/2 LSB for the J, A and S versions.
MONOTONICITY: A DAC is said to be monotonic if the
output either increases or remains constant for increasing digital
inputs such that the output will always be a nondecreasing func-
tion of input. All versions of the AD667 are monotonic over
their full operating temperature range.
DIFFERENTIAL NONLINEARITY: Monotonic behavior re-
quires that the differential linearity error be less than 1 LSB
both at +25
°C and over the temperature range of interest. Dif-
ferential nonlinearity is the measure of the variation in analog
value, normalized to full scale, associated with a 1 LSB change
in digital input code. For example, for a 10 volt full-scale out-
put, a change of 1 LSB in digital input code should result in a
2.44 mV change in the analog output (1 LSB = 10 V
× 1/4096 =
2.44 mV). If in actual use, however, a 1 LSB change in the
input code results in a change of only 0.61 mV (1/4 LSB) in
analog output, the differential linearity error would be –1.83 mV,
or –3/4 LSB. The AD667K and B grades have a max differential
linearity error of 1/2 LSB, which specifies that every step will be
at least 1/2 LSB and at most 1 1/2 LSB.
Table I. Output Voltage Range Connections
Output
Digital
Connect
Range
Input Codes
Pin 9 to
Pin 1 to
Pin 2 to
Pin 4 to
±10 V
Offset Binary
1
9
NC
6 (Through 50
Fixed or 100 Trim Resistor)
±5 V
Offset Binary
1 and 2
2 and 9
1 and 9
6 (Through 50
Fixed or 100 Trim Resistor)
±2.5 V
Offset Binary
2
3
9
6 (Through 50
Fixed or 100 Trim Resistor)
0 V to +10 V
Straight Binary
1 and 2
2 and 9
1 and 9
5 (or Optional Trim—See Figure 2)
0 V to +5 V
Straight Binary
2
3
9
5 (or Optional Trim—See Figure 2)
PLCC, LCC
DIP