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参数资料
| 型号： | AD677KRZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/16页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT 100KSPS 28-SOIC |
| 标准包装： | 1,000 |
| 位数： | 16 |
| 采样率（每秒）： | 100k |
| 数据接口： | DSP，串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 480mW |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC W |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个单端，双极 |
| 配用： | AD677-EB-ND - BOARD EVAL SAMPLING ADC AD677 |
AD677
REV. A
–11–
made for selecting one with low noise. A capacitor connected
between REF IN and AGND will reduce the demands on the
reference by decreasing the magnitude of high frequency com-
ponents required to be sourced by the reference.
Figures 6 and 7 represent typical design approaches.
VIN
10F
AGND
CN
1.0F
+12V
AD586
AD677
6
2
4
8
VREF
0.1F
Figure 6.
Figure 6 shows a voltage reference circuit featuring the 5 V out-
put AD586. The AD586 is a low cost reference which utilizes a
buried Zener architecture to provide low noise and drift. Over
the 0
°C to +70°C range, the AD586M grade exhibits less than
1.0 mV output change from its initial value at +25
°C. A noise
reduction capacitor, CN, reduces the broadband noise of the
AD586 output, thereby optimizing the overall performance of
the AD677. It is recommended that a 10
F to 47 F high qual-
ity tantalum capacitor and a 0.1
F capacitor be tied between
the VREF input of the AD677 and ground to minimize the im-
pedance on the reference.
Using the AD677 with
±10 V input range (V
REF = 10 V) typi-
cally requires
±15 V supplies to drive op amps and the voltage
reference. If
±12 V is not available in the system, regulators
such as 78L12 and 79L12 can be used to provide power for the
AD677. This is also the recommended approach (for any input
range) when the ADC system is subjected to harsh environ-
ments such as where the power supplies are noisy and where
voltage spikes are present. Figure 7 shows an example of such a
system based upon the 10 V AD587 reference, which provides a
300
V LSB. Circuitry for additional protection against power
supply disturbances has been shown. A 100
F capacitor at each
+15V
+5V
–15V
100F
AD677
10F
0.1F
78L12
79L12
0.01F
VIN
VREF
VDD
VCC
VEE
VIN
VO
NR
GND
VIN
10F
0.1F
1F
AD587
10F
4
2
6
8
0.1F
10
10
10
10
Figure 7.
regulator prevents very large voltage spikes from entering the
regulators. Any power line noise which the regulators cannot
eliminate will be further filtered by an RC filter (10
/10 F)
having a –3 dB point at 1.6 kHz. For best results the regulators
should be within a few centimeters of the AD677.
ANALOG INPUT
As previously discussed, the analog input voltage range for the
AD677 is
±V
REF. For purposes of ground drop and common
mode rejection, the VIN and VREF inputs each have their own
ground. VREF is referred to the local analog system ground
(AGND), and VIN is referred to the analog ground sense pin
(AGND SENSE) which allows a remote ground sense for the
input signal.
The AD677 analog inputs (VIN, VREF and AGND SENSE) ex-
hibit dynamic characteristics. When a conversion cycle begins,
each analog input is connected to an internal, discharged 50 pF
capacitor which then charges to the voltage present at the corre-
sponding pin. The capacitor is disconnected when SAMPLE is
taken LOW, and the stored charge is used in the subsequent
conversion. In order to limit the demands placed on the external
source by this high initial charging current, an internal buffer
amplifier is employed between the input and this capacitance for
a few hundred nanoseconds. During this time the input pin ex-
hibits typically 20 k
input resistance, 10 pF input capacitance
and
±40 A bias current. Next, the input is switched directly to
the now precharged capacitor and allowed to fully settle. During
this time the input sees only a 50 pF capacitor. Once the sample
is taken, the input is internally floated so that the external input
source sees a very high input resistance and a parasitic input
capacitance of typically only 2 pF. As a result, the only domi-
nant input characteristic which must be considered is the high
current steps which occur when the internal buffers are switched
in and out.
In most cases, these characteristics require the use of an external
op amp to drive the input of the AD677. Care should be taken
with op amp selection; even with modest loading conditions,
most available op amps do not meet the low distortion require-
ments necessary to match the performance capabilities of the
AD677. Figure 8 represents a circuit, based upon the AD845,
which will provide excellent overall performance.
For applications optimized more for low distortion and low
noise, the AD845 of Figure 8 may be replaced by the AD743.
+12V
–12V
AD845
0.1F
AGND
SENSE
±5V
INPUT
AD677
3
7
6
VIN
4
2
1k
1k
499
Figure 8.
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相关代理商/技术参数 |
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|---|---|
| AD677TD | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MICROCIRCUIT, DIGITAL-LINEAR, FAST, SERIAL, 16-BIT, A/D CONVERTER, MULTICHIP SILICON |
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