参数资料
型号: AD7225LRZ
厂商: Analog Devices Inc
文件页数: 13/24页
文件大小: 0K
描述: IC DAC 8BIT QUAD W/AMP 24SOIC
产品培训模块: Data Converter Fundamentals
DAC Architectures
标准包装: 31
设置时间: 4µs
位数: 8
转换器数目: 4
电压电源: 双 ±
功率耗散(最大): 500mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC W
包装: 管件
输出数目和类型: 4 电压,单极;4 电压,双极
采样率(每秒): 200k
AD7225
Rev. C | Page 20 of 24
VSS GENERATION
Operating the AD7225 from dual supplies results in enhanced
performance over single-supply operation on a number of
parameters as previously outlined. Some applications may
require this enhanced performance, but may only have a single
power supply rail available. The circuit of Figure 29 shows a
method of generating a negative voltage using one CD4049,
operated from a VDD of 15 V. Two inverters of the hex inverter
chip are used as an oscillator. The other four inverters are in
parallel and used as buffers for higher output current. The
square wave output is level translated to a negative-going signal,
then rectified and filtered. The circuit configuration shown
provides an output voltage of 5.1 V for current loadings in the
range of 0.5 mA to 9 mA. This satisfies the AD7225 ISS require-
ment over the commercial operating temperature range.
1/6
CD4049AE
1/6
CD4049AE
1/6
CD4049AE
1/6
CD4049AE
1/6
CD4049AE
1/6
CD4049AE
510k
5.1k
+
0.02F
47F
5V1
–VOUT
+
1N4001
510
00986-
029
Figure 29. VSS Generation Circuit
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AD7225LRZ-REEL 功能描述:IC DAC 8BIT QUAD W/AMP 24SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:750 系列:- 设置时间:7µs 位数:16 数据接口:并联 转换器数目:1 电压电源:双 ± 功率耗散(最大):100mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-LCC(J 形引线) 供应商设备封装:28-PLCC(11.51x11.51) 包装:带卷 (TR) 输出数目和类型:1 电压,单极;1 电压,双极 采样率(每秒):143k
AD7225TCHIPS 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Digital-to-Analog Converter
AD7225TE 制造商:AD 制造商全称:Analog Devices 功能描述:LC2MOS Quad 8-Bit DAC with Separate Reference Inputs
AD7225TE/883B 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Digital-to-Analog Converter
AD7225TQ 制造商:AD 制造商全称:Analog Devices 功能描述:LC2MOS Quad 8-Bit DAC with Separate Reference Inputs